Configuration Symbol Reference

Introduction

Kconfig files describe the configuration symbols supported in the build system, the logical organization and structure that group the symbols in menus and sub-menus, and the relationships between the different configuration symbols that govern the valid configuration combinations.

The Kconfig files are distributed across the build directory tree. The files are organized based on their common characteristics and on what new symbols they add to the configuration menus.

The configuration options’ information below is extracted directly from Kconfig. Click on the option name in the table below for detailed information about each option.

Supported Options

Alphabetized Index of Configuration Options
Kconfig Symbol Description
CONFIG_2ND_LEVEL_INTERRUPTS Second-level Interrupts
CONFIG_2ND_LVL_INTR_00_OFFSET Parent interrupt number to which controller_0 maps
CONFIG_2ND_LVL_INTR_01_OFFSET Parent interrupt number to which controller_1 maps
CONFIG_2ND_LVL_INTR_02_OFFSET Parent interrupt number to which controller_2 maps
CONFIG_2ND_LVL_INTR_03_OFFSET Parent interrupt number to which controller_3 maps
CONFIG_2ND_LVL_ISR_TBL_OFFSET Offset in the SW ISR Table for 2nd level interrupt controller
CONFIG_3RD_LEVEL_INTERRUPTS Third-level Interrupts
CONFIG_3RD_LVL_INTR_00_OFFSET Parent interrupt number to which controller_0 maps
CONFIG_3RD_LVL_ISR_TBL_OFFSET Offset in the SW ISR Table for 3rd level interrupt controller
CONFIG_ADC ADC drivers
CONFIG_ADC_0 Enable ADC 0
CONFIG_ADC_0_IRQ_PRI ADC 0 interrupt priority
CONFIG_ADC_0_NAME ADC 0 Driver’s name
CONFIG_ADC_1 Enable ADC 1
CONFIG_ADC_1_IRQ_PRI ADC 1 interrupt priority
CONFIG_ADC_1_NAME ADC 1 Driver’s name
CONFIG_ADC_DW ARC Designware Driver
CONFIG_ADC_DW_CALIBRATION Enable Calibration
CONFIG_ADC_DW_CLOCK_RATIO Clock Ratio
CONFIG_ADC_DW_DUMMY_CONVERSION Enable dummy conversion
CONFIG_ADC_DW_FALLING_EDGE Falling Edge
CONFIG_ADC_DW_PARALLEL Parallel
CONFIG_ADC_DW_REPETITIVE Differential
CONFIG_ADC_DW_RISING_EDGE Rising Edge
CONFIG_ADC_DW_SAMPLE_WIDTH Sample Width
CONFIG_ADC_DW_SERIAL Serial
CONFIG_ADC_DW_SERIAL_DELAY Serial Delay
CONFIG_ADC_DW_SINGLESHOT Single Ended
CONFIG_ADC_INIT_PRIORITY Init priority
CONFIG_ADC_MCUX_ADC16 MCUX ADC16 driver
CONFIG_ADC_QMSI QMSI ADC Driver
CONFIG_ADC_QMSI_CALIBRATION Enable Calibration
CONFIG_ADC_QMSI_CLOCK_RATIO Clock Ratio
CONFIG_ADC_QMSI_INTERRUPT Interrupt notification
CONFIG_ADC_QMSI_POLL Polling samples
CONFIG_ADC_QMSI_SAMPLE_WIDTH Sample Width / Sample Width
CONFIG_ADC_QMSI_SERIAL_DELAY Serial Delay
CONFIG_ADC_QMSI_SS QMSI ADC Driver for the Sensor Subsystem
CONFIG_ADC_SAM_AFEC SAM ADC Driver
CONFIG_ADC_TI_ADC108S102 TI adc108s102 chip driver
CONFIG_ADC_TI_ADC108S102_SPI_FREQ Master SPI port max frequency
CONFIG_ADC_TI_ADC108S102_SPI_PORT_NAME Master SPI port name
CONFIG_ADC_TI_ADC108S102_SPI_SLAVE SPI slave slot
CONFIG_ADT7420 ADT7420 Temperature Sensor
CONFIG_ADT7420_GPIO_DEV_NAME GPIO device
CONFIG_ADT7420_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_ADT7420_I2C_ADDR I2C address for ADT7420
CONFIG_ADT7420_I2C_MASTER_DEV_NAME I2C master where ADT7420 is connected
CONFIG_ADT7420_NAME Driver name
CONFIG_ADT7420_TEMP_CRIT Critical overtemperature in °C
CONFIG_ADT7420_TEMP_HYST Temperature hysteresis in °C
CONFIG_ADT7420_THREAD_PRIORITY Thread priority
CONFIG_ADT7420_THREAD_STACK_SIZE Thread stack size
CONFIG_ADT7420_TRIGGER  
CONFIG_ADT7420_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_ADT7420_TRIGGER_NONE No trigger
CONFIG_ADT7420_TRIGGER_OWN_THREAD Use own thread
CONFIG_ADXL362 ADXL362 sensor
CONFIG_ADXL362_ACCEL_ODR_100 100 Hz
CONFIG_ADXL362_ACCEL_ODR_12_5 12.5 Hz
CONFIG_ADXL362_ACCEL_ODR_200 200 Hz
CONFIG_ADXL362_ACCEL_ODR_25 25 Hz
CONFIG_ADXL362_ACCEL_ODR_400 400 Hz
CONFIG_ADXL362_ACCEL_ODR_50 50 Hz
CONFIG_ADXL362_ACCEL_ODR_RUNTIME Set at runtime.
CONFIG_ADXL362_ACCEL_RANGE_2G 2G
CONFIG_ADXL362_ACCEL_RANGE_4G 4G
CONFIG_ADXL362_ACCEL_RANGE_8G 8G
CONFIG_ADXL362_ACCEL_RANGE_RUNTIME Set at runtime.
CONFIG_ADXL362_DEV_NAME ADXL362 device name
CONFIG_ADXL362_SPI_DEV_NAME SPI device where ADXL362 is connected
CONFIG_ADXL362_SPI_DEV_SLAVE SPI Slave Select where ADXL362 is connected
CONFIG_AHB_DIV AHB clock divider
CONFIG_AIO_COMPARATOR AIO/Comparator Configuration
CONFIG_AIO_COMPARATOR_0_IRQ_PRI IRQ Priority for AIO/comparator
CONFIG_AIO_COMPARATOR_0_NAME Device name for AIO/comparator
CONFIG_AIO_COMPARATOR_QMSI Enable QMSI AIO/comparator driver
CONFIG_AK8975 AK8975 Magnetometer
CONFIG_AK8975_I2C_ADDR I2C address
CONFIG_AK8975_I2C_MASTER_DEV_NAME I2C master where AK8975 is connected
CONFIG_AK8975_NAME Driver name
CONFIG_ALTERA_AVALON_I2C  
CONFIG_ALTERA_AVALON_MSGDMA  
CONFIG_ALTERA_AVALON_PIO  
CONFIG_ALTERA_AVALON_QSPI  
CONFIG_ALTERA_AVALON_SYSID  
CONFIG_ALTERA_AVALON_TIMER Altera Avalon Interval Timer
CONFIG_AMG88XX AMG88XX Infrared Thermopile Sensor
CONFIG_AMG88XX_GPIO_DEV_NAME GPIO device
CONFIG_AMG88XX_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_AMG88XX_I2C_ADDR I2C address for AMG88XX Sensor
CONFIG_AMG88XX_I2C_MASTER_DEV_NAME I2C master where AMG88XX is connected
CONFIG_AMG88XX_NAME Driver name
CONFIG_AMG88XX_THREAD_PRIORITY Thread priority
CONFIG_AMG88XX_THREAD_STACK_SIZE Thread stack size
CONFIG_AMG88XX_TRIGGER  
CONFIG_AMG88XX_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_AMG88XX_TRIGGER_NONE No trigger
CONFIG_AMG88XX_TRIGGER_OWN_THREAD Use own thread
CONFIG_AON_API_REENTRANCY AON driver API reentrancy
CONFIG_AON_COUNTER_QMSI AON counter driver
CONFIG_AON_COUNTER_QMSI_DEV_NAME QMSI AON Counter Device Name
CONFIG_AON_TIMER_IRQ_PRI Interrupt priority
CONFIG_AON_TIMER_QMSI AON periodic timer driver
CONFIG_AON_TIMER_QMSI_DEV_NAME QMSI AON Timer Device Name
CONFIG_APA102_STRIP APA102 SPI LED strip driver
CONFIG_APDS9960 APDS9960 Sensor
CONFIG_APDS9960_DRV_NAME Driver name
CONFIG_APDS9960_I2C_DEV_NAME I2C Master
CONFIG_APPLICATION_DEFINED_SYSCALL Scan application folder for any syscall definition
CONFIG_APPLICATION_INIT_PRIORITY Default init priority for application level drivers
CONFIG_APPLICATION_MEMORY Split kernel and application memory
CONFIG_APP_LINK_WITH_FS Link ‘app’ with FS
CONFIG_APP_LINK_WITH_MBEDTLS Link ‘app’ with MBEDTLS
CONFIG_APP_LINK_WITH_MCUMGR Link ‘app’ with MCUMGR
CONFIG_APP_SHARED_MEM Application shared memory with app_memory
CONFIG_ARC ARC architecture
CONFIG_ARCH  
CONFIG_ARCH_CACHE_FLUSH_DETECT  
CONFIG_ARCH_DEFCONFIG  
CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT  
CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN  
CONFIG_ARCH_HAS_EXECUTABLE_PAGE_BIT  
CONFIG_ARCH_HAS_STACK_PROTECTION  
CONFIG_ARCH_HAS_THREAD_ABORT  
CONFIG_ARCH_HAS_USERSPACE  
CONFIG_ARCH_POSIX POSIX (native) architecture
CONFIG_ARCH_POSIX_RECOMMENDED_STACK_SIZE  
CONFIG_ARCV2_INTERRUPT_UNIT ARCv2 Interrupt Unit
CONFIG_ARCV2_TIMER ARC Timer
CONFIG_ARCV2_TIMER_IRQ_PRIORITY ARC timer interrupt priority
CONFIG_ARC_CORE_MPU ARC Core MPU functionalities
CONFIG_ARC_FIRQ FIRQ enable
CONFIG_ARC_GDB_ENABLE Allows the usage of GDB with the ARC processor.
CONFIG_ARC_HAS_SECURE  
CONFIG_ARC_INIT Quark SE ARC Kickoff
CONFIG_ARC_MPU ARC MPU Support
CONFIG_ARC_MPU_ENABLE Enable MPU
CONFIG_ARC_MPU_VER ARC MPU version
CONFIG_ARC_STACK_CHECKING  
CONFIG_ARM ARM architecture
CONFIG_ARMV6_M_ARMV8_M_BASELINE  
CONFIG_ARMV7_M_ARMV8_M_FP  
CONFIG_ARMV7_M_ARMV8_M_MAINLINE  
CONFIG_ARMV8_M_BASELINE  
CONFIG_ARMV8_M_DSP  
CONFIG_ARMV8_M_MAINLINE  
CONFIG_ARMV8_M_SE  
CONFIG_ARM_CLOCK_CONTROL_DEV_NAME Clock Config Device name
CONFIG_ARM_CORE_MPU ARM Core MPU functionalities
CONFIG_ARM_DIV ARM clock divider
CONFIG_ARM_ENTRY_VENEERS_LIB_NAME Entry Veneers symbol file
CONFIG_ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS Secure Firmware has Secure Entry functions
CONFIG_ARM_MPU ARM MPU Support
CONFIG_ARM_MPU_ENABLE Enable MPU on ARM Beetle
CONFIG_ARM_MPU_IMX_RT Enable MPU on i.MX RT
CONFIG_ARM_MPU_NRF52X Enable MPU on nRF52
CONFIG_ARM_NONSECURE_FIRMWARE  
CONFIG_ARM_NSC_REGION_BASE_ADDRESS ARM Non-Secure Callable Region base address
CONFIG_ARM_SECURE_FIRMWARE  
CONFIG_ARM_STACK_PROTECTION  
CONFIG_ASAN Build with address sanitizer
CONFIG_ASF  
CONFIG_ASSERT Enable __ASSERT() macro
CONFIG_ASSERT_LEVEL __ASSERT() level
CONFIG_ATMEL_WINC1500  
CONFIG_ATOMIC_OPERATIONS_BUILTIN  
CONFIG_ATOMIC_OPERATIONS_C  
CONFIG_ATOMIC_OPERATIONS_CUSTOM  
CONFIG_BASE64 Enable base64 encoding and decoding
CONFIG_BATTERY_SENSE Enable the battery sense circuit
CONFIG_BLUETOOTH_BULK_EP_MPS  
CONFIG_BLUETOOTH_INT_EP_MPS  
CONFIG_BMA280 BMA280 Three Axis Accelerometer Family
CONFIG_BMA280_CHIP_BMA280 BMA280
CONFIG_BMA280_CHIP_BMC150_ACCEL BMC150_ACCEL
CONFIG_BMA280_GPIO_DEV_NAME GPIO device
CONFIG_BMA280_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_BMA280_I2C_ADDR BMA280 I2C address
CONFIG_BMA280_I2C_MASTER_DEV_NAME I2C master device name
CONFIG_BMA280_NAME Driver name
CONFIG_BMA280_PMU_BW_1 7.81Hz
CONFIG_BMA280_PMU_BW_2 15.63HZ
CONFIG_BMA280_PMU_BW_3 31.25Hz
CONFIG_BMA280_PMU_BW_4 62.5Hz
CONFIG_BMA280_PMU_BW_5 125Hz
CONFIG_BMA280_PMU_BW_6 250HZ
CONFIG_BMA280_PMU_BW_7 500Hz
CONFIG_BMA280_PMU_BW_8 unfiltered
CONFIG_BMA280_PMU_RANGE_16G +/-16g
CONFIG_BMA280_PMU_RANGE_2G +/-2g
CONFIG_BMA280_PMU_RANGE_4G +/-4g
CONFIG_BMA280_PMU_RANGE_8G +/-8g
CONFIG_BMA280_THREAD_PRIORITY Thread priority
CONFIG_BMA280_THREAD_STACK_SIZE Thread stack size
CONFIG_BMA280_TRIGGER  
CONFIG_BMA280_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_BMA280_TRIGGER_NONE No trigger
CONFIG_BMA280_TRIGGER_OWN_THREAD Use own thread
CONFIG_BMC150_MAGN BMC150_MAGN I2C Magnetometer Chip
CONFIG_BMC150_MAGN_DEV_NAME BMC150_MAGN device name
CONFIG_BMC150_MAGN_GPIO_DRDY_DEV_NAME GPIO device where BMC150_MAGN data ready interrupt is connected
CONFIG_BMC150_MAGN_GPIO_DRDY_INT_PIN GPIO pin number for the data ready interrupt pin
CONFIG_BMC150_MAGN_I2C_ADDR BMC150_MAGN I2C slave address
CONFIG_BMC150_MAGN_I2C_MASTER_DEV_NAME I2C master where BMC150_MAGN is connected
CONFIG_BMC150_MAGN_PRESET_ENHANCED_REGULAR Enhanced regular (15, 27, 10)
CONFIG_BMC150_MAGN_PRESET_HIGH_ACCURACY High accuracy (47, 83, 20)
CONFIG_BMC150_MAGN_PRESET_LOW_POWER Low power (3, 3, 10)
CONFIG_BMC150_MAGN_PRESET_REGULAR Regular (9, 15, 10)
CONFIG_BMC150_MAGN_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate
CONFIG_BMC150_MAGN_SAMPLING_REP_XY Enable dynamic XY oversampling
CONFIG_BMC150_MAGN_SAMPLING_REP_Z Enable dynamic Z oversampling
CONFIG_BMC150_MAGN_TRIGGER Enable triggers
CONFIG_BMC150_MAGN_TRIGGER_DRDY Enable data ready trigger
CONFIG_BMC150_MAGN_TRIGGER_THREAD_STACK Thread stack size
CONFIG_BME280 BME280/BMP280 sensor
CONFIG_BME280_DEV_NAME BME280 device name
CONFIG_BME280_DEV_TYPE_I2C I2C
CONFIG_BME280_DEV_TYPE_SPI SPI
CONFIG_BME280_FILTER_16 16
CONFIG_BME280_FILTER_2 2
CONFIG_BME280_FILTER_4 4
CONFIG_BME280_FILTER_8 8
CONFIG_BME280_FILTER_OFF filter off
CONFIG_BME280_HUMIDITY_OVER_16X x16
CONFIG_BME280_HUMIDITY_OVER_1X x1
CONFIG_BME280_HUMIDITY_OVER_2X x2
CONFIG_BME280_HUMIDITY_OVER_4X x4
CONFIG_BME280_HUMIDITY_OVER_8X x8
CONFIG_BME280_I2C_ADDR BME280 I2C slave address
CONFIG_BME280_I2C_MASTER_DEV_NAME I2C master where BME280 is connected
CONFIG_BME280_PRESS_OVER_16X x16
CONFIG_BME280_PRESS_OVER_1X x1
CONFIG_BME280_PRESS_OVER_2X x2
CONFIG_BME280_PRESS_OVER_4X x4
CONFIG_BME280_PRESS_OVER_8X x8
CONFIG_BME280_SPI_DEV_NAME SPI device where BME280 is connected
CONFIG_BME280_SPI_DEV_SLAVE SPI Slave Select where BME280 is connected
CONFIG_BME280_STANDBY_05MS 0.5ms
CONFIG_BME280_STANDBY_1000MS 1000ms
CONFIG_BME280_STANDBY_125MS 125ms
CONFIG_BME280_STANDBY_2000MS 2000ms BMP280 / 10ms BME280
CONFIG_BME280_STANDBY_250MS 250ms
CONFIG_BME280_STANDBY_4000MS 4000ms BMP280 / 20ms BME280
CONFIG_BME280_STANDBY_500MS 500ms
CONFIG_BME280_STANDBY_62MS 62.5ms
CONFIG_BME280_TEMP_OVER_16X x16
CONFIG_BME280_TEMP_OVER_1X x1
CONFIG_BME280_TEMP_OVER_2X x2
CONFIG_BME280_TEMP_OVER_4X x4
CONFIG_BME280_TEMP_OVER_8X x8
CONFIG_BMG160 Bosch BMG160 gyroscope support
CONFIG_BMG160_DRV_NAME Driver’s name
CONFIG_BMG160_GPIO_PORT_NAME GPIO controller port name
CONFIG_BMG160_I2C_ADDR BMG160 I2C address
CONFIG_BMG160_I2C_PORT_NAME I2C master controller port name
CONFIG_BMG160_I2C_SPEED_FAST Fast
CONFIG_BMG160_I2C_SPEED_STANDARD Standard
CONFIG_BMG160_INT_PIN BMG160 INT PIN
CONFIG_BMG160_ODR_100 100 Hz
CONFIG_BMG160_ODR_1000 1000 Hz
CONFIG_BMG160_ODR_200 200 Hz
CONFIG_BMG160_ODR_2000 2000 Hz
CONFIG_BMG160_ODR_400 400 Hz
CONFIG_BMG160_ODR_RUNTIME Set at runtime.
CONFIG_BMG160_RANGE_1000DPS 1000 DPS
CONFIG_BMG160_RANGE_125DPS 125 DPS
CONFIG_BMG160_RANGE_2000DPS 2000 DPS
CONFIG_BMG160_RANGE_250DPS 250 DPS
CONFIG_BMG160_RANGE_500DPS 500 DPS
CONFIG_BMG160_RANGE_RUNTIME Set at runtime.
CONFIG_BMG160_THREAD_PRIORITY Own thread priority
CONFIG_BMG160_THREAD_STACK_SIZE Own thread stack size
CONFIG_BMG160_TRIGGER  
CONFIG_BMG160_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_BMG160_TRIGGER_NONE No trigger
CONFIG_BMG160_TRIGGER_OWN_THREAD Use own thread
CONFIG_BMI160 Bosch BMI160 inertial measurement unit
CONFIG_BMI160_ACCEL_ODR_100 100 Hz
CONFIG_BMI160_ACCEL_ODR_1600 1600 Hz
CONFIG_BMI160_ACCEL_ODR_200 200 Hz
CONFIG_BMI160_ACCEL_ODR_25 25 Hz
CONFIG_BMI160_ACCEL_ODR_25_16 1.56 Hz
CONFIG_BMI160_ACCEL_ODR_25_2 12.5 Hz
CONFIG_BMI160_ACCEL_ODR_25_32 0.78 Hz
CONFIG_BMI160_ACCEL_ODR_25_4 6.25 Hz
CONFIG_BMI160_ACCEL_ODR_25_8 3.125 Hz
CONFIG_BMI160_ACCEL_ODR_400 400 Hz
CONFIG_BMI160_ACCEL_ODR_50 50 Hz
CONFIG_BMI160_ACCEL_ODR_800 800 Hz
CONFIG_BMI160_ACCEL_ODR_RUNTIME Set at runtime.
CONFIG_BMI160_ACCEL_PMU_LOW_POWER low power
CONFIG_BMI160_ACCEL_PMU_NORMAL normal
CONFIG_BMI160_ACCEL_PMU_RUNTIME Set at runtime.
CONFIG_BMI160_ACCEL_PMU_SUSPEND suspended/not used
CONFIG_BMI160_ACCEL_RANGE_16G 16G
CONFIG_BMI160_ACCEL_RANGE_2G 2G
CONFIG_BMI160_ACCEL_RANGE_4G 4G
CONFIG_BMI160_ACCEL_RANGE_8G 8G
CONFIG_BMI160_ACCEL_RANGE_RUNTIME Set at runtime.
CONFIG_BMI160_GPIO_DEV_NAME Gpio device
CONFIG_BMI160_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_BMI160_GYRO_ODR_100 100 Hz
CONFIG_BMI160_GYRO_ODR_1600 1600 Hz
CONFIG_BMI160_GYRO_ODR_200 200 Hz
CONFIG_BMI160_GYRO_ODR_25 25 Hz
CONFIG_BMI160_GYRO_ODR_3200 3200 Hz
CONFIG_BMI160_GYRO_ODR_400 400 Hz
CONFIG_BMI160_GYRO_ODR_50 50 Hz
CONFIG_BMI160_GYRO_ODR_800 800 Hz
CONFIG_BMI160_GYRO_ODR_RUNTIME Set at runtime.
CONFIG_BMI160_GYRO_PMU_FAST_STARTUP fast start-up
CONFIG_BMI160_GYRO_PMU_NORMAL normal
CONFIG_BMI160_GYRO_PMU_RUNTIME Set at runtime.
CONFIG_BMI160_GYRO_PMU_SUSPEND suspended/not used
CONFIG_BMI160_GYRO_RANGE_1000DPS 1000 DPS
CONFIG_BMI160_GYRO_RANGE_125DPS 125 DPS
CONFIG_BMI160_GYRO_RANGE_2000DPS 2000 DPS
CONFIG_BMI160_GYRO_RANGE_250DPS 250 DPS
CONFIG_BMI160_GYRO_RANGE_500DPS 500 DPS
CONFIG_BMI160_GYRO_RANGE_RUNTIME Set at runtime.
CONFIG_BMI160_NAME Driver’s name
CONFIG_BMI160_SLAVE BMI160 SPI slave select pin
CONFIG_BMI160_SPI_BUS_FREQ BMI160 SPI bus speed in Hz
CONFIG_BMI160_SPI_PORT_NAME SPI master controller port name
CONFIG_BMI160_THREAD_PRIORITY Own thread priority
CONFIG_BMI160_THREAD_STACK_SIZE Own thread stack size
CONFIG_BMI160_TRIGGER  
CONFIG_BMI160_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_BMI160_TRIGGER_NONE No trigger
CONFIG_BMI160_TRIGGER_OWN_THREAD Use own thread
CONFIG_BMM150 BMM150 I2C Geomagnetic Chip
CONFIG_BMM150_DEV_NAME BMM150 device name
CONFIG_BMM150_I2C_ADDR BMM150 I2C slave address
CONFIG_BMM150_I2C_MASTER_DEV_NAME I2C master where BMM150 is connected
CONFIG_BMM150_PRESET_ENHANCED_REGULAR Enhanced regular (15, 27, 10)
CONFIG_BMM150_PRESET_HIGH_ACCURACY High accuracy (47, 83, 20)
CONFIG_BMM150_PRESET_LOW_POWER Low power (3, 3, 10)
CONFIG_BMM150_PRESET_REGULAR Regular (9, 15, 10)
CONFIG_BMM150_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate
CONFIG_BMM150_SAMPLING_REP_XY Enable dynamic XY oversampling
CONFIG_BMM150_SAMPLING_REP_Z Enable dynamic Z oversampling
CONFIG_BOARD  
CONFIG_BOARD_96B_ARGONKEY 96Boards Argonkey
CONFIG_BOARD_96B_CARBON 96Boards Carbon (STM32F401)
CONFIG_BOARD_96B_CARBON_NRF51 96Boards Carbon (nRF51)
CONFIG_BOARD_96B_NEONKEY 96Boards Neonkey
CONFIG_BOARD_96B_NITROGEN 96Boards Nitrogen
CONFIG_BOARD_ADAFRUIT_FEATHER_M0_BASIC_PROTO Adafruit Feather M0 Basic Proto
CONFIG_BOARD_ADAFRUIT_TRINKET_M0 Adafruit Trinket M0
CONFIG_BOARD_ALTERA_MAX10 Altera MAX10 Board
CONFIG_BOARD_ARDUINO_101 Arduino 101 Board
CONFIG_BOARD_ARDUINO_101_SSS Arduino 101 Sensor Sub System
CONFIG_BOARD_ARDUINO_DUE Arduino Due Board
CONFIG_BOARD_ARDUINO_ZERO Arduino Zero
CONFIG_BOARD_ATSAMD20_XPRO SAM D20 Xplained Pro
CONFIG_BOARD_BBC_MICROBIT BBC MICRO:BIT
CONFIG_BOARD_CC2650_SENSORTAG TI CC2650 SensorTag
CONFIG_BOARD_CC3220SF_LAUNCHXL TI CC3220SF LAUNCHXL
CONFIG_BOARD_CCS_VDD_PWR_CTRL_INIT_PRIORITY CCS_VDD power rail init priority
CONFIG_BOARD_COLIBRI_IMX7D_M4 Toradex Colibri iMX7 Dual
CONFIG_BOARD_CURIE_BLE Curie BLE
CONFIG_BOARD_DEPRECATED  
CONFIG_BOARD_DISCO_L475_IOT1 Discovery IoT L475 Development Board
CONFIG_BOARD_DRAGINO_LSN50 Dragino LSN50 Sensor Node
CONFIG_BOARD_EFM32WG_STK3800 SiLabs EFM32WG-STK3800 (Wonder Gecko)
CONFIG_BOARD_EFR32_SLWSTK6061A SiLabs EFR32-SLWSTK6061A (Flex Gecko)
CONFIG_BOARD_EM_STARTERKIT ARC EM Starter Kit
CONFIG_BOARD_EM_STARTERKIT_R22 2.2
CONFIG_BOARD_EM_STARTERKIT_R23 2.3
CONFIG_BOARD_ENABLE_DCDC Enable DCDC mode / Enable DCDC mode / Enable DCDC mode / Enable DCDC mode / Enable DCDC mode
CONFIG_BOARD_ESP32 ESP32 Development Board
CONFIG_BOARD_FRDM_K64F Freescale FRDM-K64F
CONFIG_BOARD_FRDM_KL25Z NXP FRDM-KL25Z
CONFIG_BOARD_FRDM_KW41Z NXP FRDM-KW41Z
CONFIG_BOARD_GALILEO Galileo Gen2
CONFIG_BOARD_HEXIWEAR_K64 NXP Hexiwear K64
CONFIG_BOARD_HEXIWEAR_KW40Z Hexiwear KW40Z
CONFIG_BOARD_HIFIVE1 HiFive1 target
CONFIG_BOARD_INIT_PRIORITY  
CONFIG_BOARD_INTEL_S1000_CRB Xtensa on Intel_S1000
CONFIG_BOARD_LPCXPRESSO54114_M0 NXP LPCXPRESSO-54114 M0
CONFIG_BOARD_LPCXPRESSO54114_M4 NXP LPCXPRESSO-54114 M4
CONFIG_BOARD_M2GL025_MIV Microsemi M2GL025 IGLOO2 dev board with Mi-V CPU
CONFIG_BOARD_MIMXRT1050_EVK NXP MIMXRT1050-EVK
CONFIG_BOARD_MINNOWBOARD MinnowBoard Max
CONFIG_BOARD_MPS2_AN385 ARM Cortex-M3 SMM on V2M-MPS2 (Application Note AN385)
CONFIG_BOARD_MSP_EXP432P401R_LAUNCHXL TI MSP-EXP432P401R LAUNCHXL
CONFIG_BOARD_NATIVE_POSIX Native POSIX
CONFIG_BOARD_NRF51_BLE400 nRF51 BLE400
CONFIG_BOARD_NRF51_BLENANO nRF51 BLENANO
CONFIG_BOARD_NRF51_PCA10028 nRF51 PCA10028
CONFIG_BOARD_NRF51_VBLUNO51 nRF51 VBLUno51 BLE
CONFIG_BOARD_NRF52810_PCA10040 nRF52810 PCA10040
CONFIG_BOARD_NRF52840_PCA10056 NRF52840 PCA10056
CONFIG_BOARD_NRF52840_PCA10059 NRF52840 PCA10059
CONFIG_BOARD_NRF52_ADAFRUIT_FEATHER nRF52 ADAFRUIT FEATHER
CONFIG_BOARD_NRF52_BLENANO2 nRF52 BLENANO2
CONFIG_BOARD_NRF52_PCA10040 nRF52 PCA10040
CONFIG_BOARD_NRF52_PCA20020 nRF52 PCA20020
CONFIG_BOARD_NRF52_SPARKFUN nRF52 SPARKFUN
CONFIG_BOARD_NRF52_VBLUNO52 nRF52 VBLUno52
CONFIG_BOARD_NSIM_EM ARC EM Nsim simulator
CONFIG_BOARD_NUCLEO_F030R8 NUCLEO-64 F030R8 Development Board
CONFIG_BOARD_NUCLEO_F070RB NUCLEO-64 F070RB Development Board
CONFIG_BOARD_NUCLEO_F091RC NUCLEO-64 F091RC Development Board
CONFIG_BOARD_NUCLEO_F103RB NUCLEO-64 F103RB Development Board
CONFIG_BOARD_NUCLEO_F207ZG NUCLEO-144 F207ZG Development Board
CONFIG_BOARD_NUCLEO_F334R8 NUCLEO-64 F334R8 Development Board
CONFIG_BOARD_NUCLEO_F401RE NUCLEO-64 F401RE Development Board
CONFIG_BOARD_NUCLEO_F411RE NUCLEO-64 F411RE Development Board
CONFIG_BOARD_NUCLEO_F412ZG NUCLEO-144 F412ZG Development Board
CONFIG_BOARD_NUCLEO_F413ZH NUCLEO-144 F413ZH Development Board
CONFIG_BOARD_NUCLEO_F429ZI NUCLEO-144 F429ZI Development Board
CONFIG_BOARD_NUCLEO_F446RE Nucleo F446RE Development Board
CONFIG_BOARD_NUCLEO_L053R8 NUCLEO-64 L053R8 Development Board
CONFIG_BOARD_NUCLEO_L073RZ NUCLEO-64 L073RZ Development Board
CONFIG_BOARD_NUCLEO_L432KC Nucleo L432KC Development Board
CONFIG_BOARD_NUCLEO_L476RG Nucleo L476RG Development Board
CONFIG_BOARD_OLIMEXINO_STM32 OLIMEXINO-STM32 Development Board
CONFIG_BOARD_OLIMEX_STM32_E407 OLIMEX-STM32-E407 Development Board
CONFIG_BOARD_OLIMEX_STM32_H407 OLIMEX-STM32-H407 Development Board
CONFIG_BOARD_OLIMEX_STM32_P405 OLIMEX-STM32-P405 Development Board
CONFIG_BOARD_QEMU_CORTEX_M3 Cortex-M3 Emulation (QEMU)
CONFIG_BOARD_QEMU_NIOS2 QEMU NIOS II target
CONFIG_BOARD_QEMU_RISCV32 QEMU RISCV32 target
CONFIG_BOARD_QEMU_X86 QEMU x86
CONFIG_BOARD_QEMU_XTENSA Xtensa emulation using QEMU
CONFIG_BOARD_QUARK_D2000_CRB Intel Quark D2000 CRB
CONFIG_BOARD_QUARK_SE_C1000_BLE Quark SE C1000 Devboard - BLE Core
CONFIG_BOARD_QUARK_SE_C1000_DEVBOARD Quark SE C1000 Devboard
CONFIG_BOARD_QUARK_SE_C1000_DEVBOARD_SS Quark SE C1000 - Sensor Sub System
CONFIG_BOARD_SAM4S_XPLAINED Atmel SAM4S Xplained
CONFIG_BOARD_SAM_E70_XPLAINED Atmel SMART SAM E70 Xplained Board
CONFIG_BOARD_STM3210C_EVAL STM3210C-EVAL Evaluation Board
CONFIG_BOARD_STM32373C_EVAL STM32373C_EVAL Evaluation Board
CONFIG_BOARD_STM32F072B_DISCO STM32F072B-DISCO Development Board
CONFIG_BOARD_STM32F072_EVAL STM32F072-EVAL Development Board
CONFIG_BOARD_STM32F0_DISCO STM32F0DISCOVERY Development Board
CONFIG_BOARD_STM32F3_DISCO STM32F3DISCOVERY Development Board
CONFIG_BOARD_STM32F411E_DISCO STM32F411E-DISCO Development Board
CONFIG_BOARD_STM32F412G_DISCO STM32F412G-DISCO Development Board
CONFIG_BOARD_STM32F429I_DISC1 STM32F429I-DISC1 Development Board
CONFIG_BOARD_STM32F469I_DISCO STM32F469I-DISCO Development Board
CONFIG_BOARD_STM32F4_DISCO STM32F4DISCOVERY Development Board
CONFIG_BOARD_STM32F723E_DISCO STM32F723E Discovery Development Board
CONFIG_BOARD_STM32F746G_DISCO STM32F746G Discovery Development Board
CONFIG_BOARD_STM32F769I_DISCO STM32F769I Discovery Development Board
CONFIG_BOARD_STM32L476G_DISCO STM32L476G Discovery Development Board
CONFIG_BOARD_STM32L496G_DISCO STM32L496G Discovery Development Board
CONFIG_BOARD_STM32_MINI_A15 STM32 MINI A15 Development Board
CONFIG_BOARD_STM32_MIN_DEV STM32 Minimum Development Board
CONFIG_BOARD_TINYTILE TinyTILE
CONFIG_BOARD_UDOO_NEO_FULL_M4 UDOO Neo Full
CONFIG_BOARD_UP_SQUARED UP Squared
CONFIG_BOARD_USB_KW24D512 NXP USB-KW24D512
CONFIG_BOARD_V2M_BEETLE ARM V2M Beetle Board
CONFIG_BOARD_VDD_PWR_CTRL_INIT_PRIORITY VDD power rail init priority
CONFIG_BOARD_X86_JAILHOUSE QEMU x86 (root cell)
CONFIG_BOARD_XTENSA  
CONFIG_BOARD_XT_SIM Xtensa Development ISS
CONFIG_BOARD_ZEDBOARD_PULPINO Zedboard pulpino target
CONFIG_BOOTLOADER_CONTEXT_RESTORE Boot loader has context restore support
CONFIG_BOOTLOADER_CONTEXT_RESTORE_SUPPORTED  
CONFIG_BOOTLOADER_ESP_IDF ESP-IDF bootloader support
CONFIG_BOOTLOADER_KEXEC Boot using Linux kexec() system call
CONFIG_BOOTLOADER_MCUBOOT MCUboot bootloader support
CONFIG_BOOTLOADER_SRAM_SIZE SRAM reserved for bootloader
CONFIG_BOOTLOADER_UNKNOWN Generic boot loader support
CONFIG_BOOT_BANNER Boot banner
CONFIG_BOOT_DELAY Boot delay in milliseconds
CONFIG_BOOT_TIME_MEASUREMENT Boot time measurements [EXPERIMENTAL]
CONFIG_BSP_SHARED_RESTORE_INFO_RAM_ADDR Address of the restore information in RAM shared with the QMSI Bootloader
CONFIG_BSP_SHARED_RESTORE_INFO_SIZE Size of the restore information in RAM shared with the QMSI Bootloader
CONFIG_BT Bluetooth support
CONFIG_BT_A2DP Bluetooth A2DP Profile [EXPERIMENTAL]
CONFIG_BT_ACL_RX_COUNT Number of incoming ACL data buffers
CONFIG_BT_ATT_ENFORCE_FLOW Enforce strict flow control semantics for incoming PDUs
CONFIG_BT_ATT_PREPARE_COUNT Number of ATT prepare write buffers
CONFIG_BT_ATT_TX_MAX Maximum number of queued outgoing ATT PDUs
CONFIG_BT_AVDTP Bluetooth AVDTP protocol support [EXPERIMENTAL]
CONFIG_BT_BLUENRG_ACI Enable ACI message with with BlueNRG-based devices
CONFIG_BT_BREDR Bluetooth BR/EDR support [EXPERIMENTAL]
CONFIG_BT_BROADCASTER Broadcaster Role support
CONFIG_BT_CENTRAL Central Role support
CONFIG_BT_CONN  
CONFIG_BT_CONN_TX_MAX Maximum number of pending TX buffers
CONFIG_BT_CTLR Bluetooth Controller
CONFIG_BT_CTLR_ADVANCED_FEATURES Show advanced features
CONFIG_BT_CTLR_ADV_EXT LE Advertising Extensions
CONFIG_BT_CTLR_ADV_INDICATION Advertisement indications
CONFIG_BT_CTLR_ASSERT_HANDLER Bluetooth Controller Assertion Handler
CONFIG_BT_CTLR_CHAN_SEL_2 Channel Selection Algorithm #2
CONFIG_BT_CTLR_COMPANY_ID Company Id
CONFIG_BT_CTLR_CONN_PARAM_REQ Connection Parameter Request
CONFIG_BT_CTLR_CONN_RSSI Connection RSSI
CONFIG_BT_CTLR_CRYPTO Enable crypto functions in Controller
CONFIG_BT_CTLR_DATA_LENGTH Data Length Update
CONFIG_BT_CTLR_DATA_LENGTH_CLEAR Data Length Support (Cleartext only)
CONFIG_BT_CTLR_DATA_LENGTH_MAX Maximum data length supported
CONFIG_BT_CTLR_DEBUG_PINS Bluetooth Controller Debug Pins
CONFIG_BT_CTLR_DTM  
CONFIG_BT_CTLR_DTM_HCI Direct Test Mode over HCI
CONFIG_BT_CTLR_DUP_FILTER_LEN Number of addresses in the scan duplicate filter
CONFIG_BT_CTLR_EXT_SCAN_FP LE Extended Scanner Filter Policies
CONFIG_BT_CTLR_FAST_ENC Fast Encryption Setup
CONFIG_BT_CTLR_FILTER  
CONFIG_BT_CTLR_GPIO_LNA Low Noise Amplifier GPIO interface
CONFIG_BT_CTLR_GPIO_LNA_OFFSET Time from LNA ON to Rx ready
CONFIG_BT_CTLR_GPIO_LNA_PIN Low Noise Amplifier GPIO pin number
CONFIG_BT_CTLR_GPIO_LNA_POL_INV Inverted polarity for the LNA pin
CONFIG_BT_CTLR_GPIO_PA Power Amplifier GPIO interface
CONFIG_BT_CTLR_GPIO_PA_OFFSET Time from PA ON to Tx ready
CONFIG_BT_CTLR_GPIO_PA_PIN Power Amplifier GPIO pin number
CONFIG_BT_CTLR_GPIO_PA_POL_INV Inverted polarity for the PA pin
CONFIG_BT_CTLR_HCI_VS_BUILD_INFO Zephyr HCI VS Build Info string
CONFIG_BT_CTLR_JOB_PRIO Ticker’s JOB IRQ priority
CONFIG_BT_CTLR_LE_ENC LE Encryption
CONFIG_BT_CTLR_LE_PING LE Ping
CONFIG_BT_CTLR_MIN_USED_CHAN Minimum Number of Used Channels
CONFIG_BT_CTLR_PA_LNA_GPIOTE_CHAN  
CONFIG_BT_CTLR_PHY PHY Update
CONFIG_BT_CTLR_PHY_2M 2Mbps PHY Support
CONFIG_BT_CTLR_PHY_2M_NRF 2Mbps Nordic Semiconductor PHY Support (Cleartext only)
CONFIG_BT_CTLR_PHY_CODED Coded PHY Support
CONFIG_BT_CTLR_PRIVACY LE Controller-based Privacy
CONFIG_BT_CTLR_PROFILE_ISR Profile radio ISR
CONFIG_BT_CTLR_RADIO_ENABLE_FAST Use tTXEN/RXEN,FAST ramp-up
CONFIG_BT_CTLR_RL_SIZE LE Controller-based Privacy Resolving List size
CONFIG_BT_CTLR_RX_BUFFERS Number of Rx buffers
CONFIG_BT_CTLR_RX_PRIO  
CONFIG_BT_CTLR_RX_PRIO_STACK_SIZE  
CONFIG_BT_CTLR_SCAN_REQ_NOTIFY Scan Request Notifications
CONFIG_BT_CTLR_SCAN_REQ_RSSI Measure Scan Request RSSI
CONFIG_BT_CTLR_SCHED_ADVANCED Advanced scheduling
CONFIG_BT_CTLR_SUBVERSION_NUMBER Subversion Number
CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER Single TIMER tIFS Trx SW switching
CONFIG_BT_CTLR_TIFS_HW H/w Accelerated tIFS Trx switching
CONFIG_BT_CTLR_TO_HOST_SPI_DEV_NAME Device Name of SPI Device to an external Bluetooth Host
CONFIG_BT_CTLR_TO_HOST_SPI_IRQ_DEV_NAME Device Name of SPI IRQ to an external Bluetooth Host
CONFIG_BT_CTLR_TO_HOST_SPI_IRQ_PIN SPI IRQ line number to an external Bluetooth Host
CONFIG_BT_CTLR_TO_HOST_UART_DEV_NAME Device Name of UART Device to an external Bluetooth Host
CONFIG_BT_CTLR_TX_BUFFERS Number of Tx buffers
CONFIG_BT_CTLR_TX_BUFFER_SIZE Tx buffer size
CONFIG_BT_CTLR_TX_PWR_0 0 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_12 -12 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_16 -16 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_20 -20 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_30 -30 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_4 -4 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_40 -40 dBm
CONFIG_BT_CTLR_TX_PWR_MINUS_8 -8 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_2 +2 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_3 +3 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_4 +4 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_5 +5 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_6 +6 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_7 +7 dBm
CONFIG_BT_CTLR_TX_PWR_PLUS_8 +8 dBm
CONFIG_BT_CTLR_WORKER_PRIO Radio and Ticker’s Worker IRQ priority
CONFIG_BT_CTLR_XTAL_ADVANCED Advanced event preparation
CONFIG_BT_CTLR_XTAL_THRESHOLD Crystal shutdown threshold in uS
CONFIG_BT_CUSTOM Custom
CONFIG_BT_DEBUG  
CONFIG_BT_DEBUG_A2DP Bluetooth A2DP debug
CONFIG_BT_DEBUG_ATT Bluetooth Attribute Protocol (ATT) debug
CONFIG_BT_DEBUG_AVDTP Bluetooth AVDTP debug
CONFIG_BT_DEBUG_CONN Bluetooth connection debug
CONFIG_BT_DEBUG_GATT Bluetooth Generic Attribute Profile (GATT) debug
CONFIG_BT_DEBUG_HCI_CORE Bluetooth HCI core debug
CONFIG_BT_DEBUG_HCI_DRIVER Bluetooth HCI driver debug
CONFIG_BT_DEBUG_HFP_HF Bluetooth Hands Free Profile (HFP) debug
CONFIG_BT_DEBUG_KEYS Bluetooth security keys debug
CONFIG_BT_DEBUG_L2CAP Bluetooth L2CAP debug
CONFIG_BT_DEBUG_LOG Normal printf-style to console
CONFIG_BT_DEBUG_MONITOR Monitor protocol over UART
CONFIG_BT_DEBUG_NONE No debug log
CONFIG_BT_DEBUG_RFCOMM Bluetooth RFCOMM debug
CONFIG_BT_DEBUG_RPA Bluetooth Resolvable Private Address (RPA) debug
CONFIG_BT_DEBUG_SDP Bluetooth Service Discovery Protocol (SDP) debug
CONFIG_BT_DEBUG_SETTINGS Bluetooth storage debug
CONFIG_BT_DEBUG_SMP Bluetooth Security Manager Protocol (SMP) debug
CONFIG_BT_DEVICE_APPEARANCE Bluetooth device appearance
CONFIG_BT_DEVICE_NAME Bluetooth device name
CONFIG_BT_DEVICE_NAME_DYNAMIC Allow to set Bluetooth device name on runtime
CONFIG_BT_DEVICE_NAME_GATT_WRITABLE Allow to write name by remote GATT clients
CONFIG_BT_DEVICE_NAME_MAX Maximum size in bytes for device name
CONFIG_BT_FIXED_PASSKEY Use a fixed passkey for pairing
CONFIG_BT_GATT_CLIENT GATT client support
CONFIG_BT_GATT_READ_MULTIPLE GATT Read Multiple Characteristic Values support
CONFIG_BT_H4 H:4 UART
CONFIG_BT_H5 H:5 UART [EXPERIMENTAL]
CONFIG_BT_HCI HCI-based
CONFIG_BT_HCI_ACL_FLOW_CONTROL Controller to Host ACL flow control support
CONFIG_BT_HCI_CMD_COUNT Number of HCI command buffers
CONFIG_BT_HCI_HOST  
CONFIG_BT_HCI_RAW RAW HCI access
CONFIG_BT_HCI_RESERVE  
CONFIG_BT_HCI_TX_PRIO  
CONFIG_BT_HCI_TX_STACK_SIZE  
CONFIG_BT_HCI_VS_EXT Zephyr HCI Vendor-Specific Extensions
CONFIG_BT_HCI_VS_EXT_DETECT Use heuristics to guess HCI vendor extensions support in advance
CONFIG_BT_HFP_HF Bluetooth Handsfree profile HF Role support [EXPERIMENTAL]
CONFIG_BT_HOST_CRYPTO  
CONFIG_BT_ID_MAX Maximum number of local identities
CONFIG_BT_L2CAP_DYNAMIC_CHANNEL L2CAP Dynamic Channel support
CONFIG_BT_L2CAP_RX_MTU Maximum supported L2CAP MTU for incoming data
CONFIG_BT_L2CAP_TX_BUF_COUNT Number of L2CAP TX buffers
CONFIG_BT_L2CAP_TX_FRAG_COUNT Number of L2CAP TX fragment buffers
CONFIG_BT_L2CAP_TX_MTU Maximum supported L2CAP MTU for L2CAP TX buffers
CONFIG_BT_LL_SW Software-based BLE Link Layer
CONFIG_BT_MAX_CONN Maximum number of simultaneous connections
CONFIG_BT_MAX_PAIRED Maximum number of paired devices
CONFIG_BT_MAX_SCO_CONN Maximum number of simultaneous SCO connections
CONFIG_BT_MESH Bluetooth Mesh support
CONFIG_BT_MESH_ADV_BUF_COUNT Number of advertising buffers
CONFIG_BT_MESH_APP_KEY_COUNT Maximum number of application keys per network
CONFIG_BT_MESH_CFG_CLI Support for Configuration Client Model
CONFIG_BT_MESH_CRPL Maximum capacity of the replay protection list
CONFIG_BT_MESH_DEBUG Enable debug logs
CONFIG_BT_MESH_DEBUG_ACCESS Access layer debug
CONFIG_BT_MESH_DEBUG_ADV Advertising debug
CONFIG_BT_MESH_DEBUG_BEACON Beacon debug
CONFIG_BT_MESH_DEBUG_CRYPTO Crypto debug
CONFIG_BT_MESH_DEBUG_FRIEND Friend debug
CONFIG_BT_MESH_DEBUG_LOW_POWER Low Power debug
CONFIG_BT_MESH_DEBUG_MODEL Foundation model debug
CONFIG_BT_MESH_DEBUG_NET Network layer debug
CONFIG_BT_MESH_DEBUG_PROV Provisioning debug
CONFIG_BT_MESH_DEBUG_PROXY Proxy debug
CONFIG_BT_MESH_DEBUG_SETTINGS Persistent settings debug
CONFIG_BT_MESH_DEBUG_TRANS Transport layer debug
CONFIG_BT_MESH_DEBUG_USE_ID_ADDR Use identity address for all advertising
CONFIG_BT_MESH_FRIEND Support for acting as a Friend Node
CONFIG_BT_MESH_FRIEND_LPN_COUNT Number of supported LPN nodes
CONFIG_BT_MESH_FRIEND_QUEUE_SIZE Minimum number of buffers supported per Friend Queue
CONFIG_BT_MESH_FRIEND_RECV_WIN Friend Receive Window
CONFIG_BT_MESH_FRIEND_SEG_RX Number of incomplete segment lists per LPN
CONFIG_BT_MESH_FRIEND_SUB_LIST_SIZE Friend Subscription List Size
CONFIG_BT_MESH_GATT_PROXY GATT Proxy Service
CONFIG_BT_MESH_HEALTH_CLI Support for Health Client Model
CONFIG_BT_MESH_IVU_DIVIDER Divider for IV Update state refresh timer
CONFIG_BT_MESH_IV_UPDATE_TEST Test the IV Update Procedure
CONFIG_BT_MESH_LABEL_COUNT Maximum number of Label UUIDs used for Virtual Addresses
CONFIG_BT_MESH_LOW_POWER Support for Low Power features
CONFIG_BT_MESH_LPN_AUTO Automatically start looking for Friend nodes once provisioned
CONFIG_BT_MESH_LPN_AUTO_TIMEOUT Time from last received message before going to LPN mode
CONFIG_BT_MESH_LPN_ESTABLISHMENT Perform Friendship establishment using low power
CONFIG_BT_MESH_LPN_GROUPS Number of groups the LPN can subscribe to
CONFIG_BT_MESH_LPN_INIT_POLL_TIMEOUT The starting value of the PollTimeout timer
CONFIG_BT_MESH_LPN_MIN_QUEUE_SIZE Minimum size of acceptable friend queue (MinQueueSizeLog)
CONFIG_BT_MESH_LPN_POLL_TIMEOUT The value of the PollTimeout timer
CONFIG_BT_MESH_LPN_RECV_DELAY Receive delay requested by the local node
CONFIG_BT_MESH_LPN_RECV_WIN_FACTOR ReceiveWindowFactor, used in the Friend Offer Delay calculation
CONFIG_BT_MESH_LPN_RETRY_TIMEOUT Retry timeout for Friend requests
CONFIG_BT_MESH_LPN_RSSI_FACTOR RSSIFactor, used in the Friend Offer Delay calculation
CONFIG_BT_MESH_LPN_SCAN_LATENCY Latency for enabling scanning
CONFIG_BT_MESH_MODEL_GROUP_COUNT Maximum number of group address subscriptions per model
CONFIG_BT_MESH_MODEL_KEY_COUNT Maximum number of application keys per model
CONFIG_BT_MESH_MSG_CACHE_SIZE Network message cache size
CONFIG_BT_MESH_NODE_ID_TIMEOUT Node Identity advertising timeout
CONFIG_BT_MESH_PB_ADV Provisioning support using the advertising bearer (PB-ADV)
CONFIG_BT_MESH_PB_GATT Provisioning support using GATT (PB-GATT)
CONFIG_BT_MESH_PROV  
CONFIG_BT_MESH_PROXY  
CONFIG_BT_MESH_PROXY_FILTER_SIZE Maximum number of filter entries per Proxy Client
CONFIG_BT_MESH_RELAY Relay support
CONFIG_BT_MESH_RPL_STORE_TIMEOUT Minimum frequency that the RPL gets updated in storage
CONFIG_BT_MESH_RX_SDU_MAX Maximum incoming Upper Transport Access PDU length
CONFIG_BT_MESH_RX_SEG_MSG_COUNT Maximum number of simultaneous incoming segmented messages
CONFIG_BT_MESH_SELF_TEST Perform self-tests
CONFIG_BT_MESH_SEQ_STORE_RATE How often the sequence number gets updated in storage
CONFIG_BT_MESH_SHELL Enable Bluetooth Mesh shell
CONFIG_BT_MESH_STORE_TIMEOUT Delay (in seconds) before storing anything persistently
CONFIG_BT_MESH_SUBNET_COUNT Maximum number of mesh subnets per network
CONFIG_BT_MESH_TX_SEG_MAX Maximum number of segments in outgoing messages
CONFIG_BT_MESH_TX_SEG_MSG_COUNT Maximum number of simultaneous outgoing segmented messages
CONFIG_BT_MONITOR_ON_DEV_NAME Device Name of Bluetooth monitor logging UART
CONFIG_BT_NO_DRIVER No default HCI driver
CONFIG_BT_NRF51_PM nRF51 Power Management [EXPERIMENTAL]
CONFIG_BT_OBSERVER Observer Role support
CONFIG_BT_PAGE_TIMEOUT Bluetooth Page Timeout
CONFIG_BT_PERIPHERAL Peripheral Role support
CONFIG_BT_PRIVACY Privacy Feature
CONFIG_BT_RECV_IS_RX_THREAD  
CONFIG_BT_RFCOMM Bluetooth RFCOMM protocol support [EXPERIMENTAL]
CONFIG_BT_RFCOMM_L2CAP_MTU L2CAP MTU for RFCOMM frames
CONFIG_BT_RPA  
CONFIG_BT_RPA_TIMEOUT Resolvable Private Address timeout
CONFIG_BT_RX_BUF_COUNT Number of HCI RX buffers
CONFIG_BT_RX_BUF_LEN Maximum supported HCI RX buffer length
CONFIG_BT_RX_PRIO  
CONFIG_BT_RX_STACK_SIZE Size of the receiving thread stack
CONFIG_BT_SCAN_WITH_IDENTITY Perform active scanning using local identity address
CONFIG_BT_SETTINGS Store Bluetooth state and configuration persistently
CONFIG_BT_SHELL Enable Bluetooth shell
CONFIG_BT_SIGNING Data signing support
CONFIG_BT_SMP Security Manager Protocol support
CONFIG_BT_SMP_FORCE_BREDR Force Bluetooth SMP over BR/EDR
CONFIG_BT_SMP_SC_ONLY Secure Connections Only Mode
CONFIG_BT_SMP_SELFTEST Bluetooth SMP self tests executed on init
CONFIG_BT_SPI SPI HCI
CONFIG_BT_SPI_BLUENRG Enable compatibility with BlueNRG-based devices
CONFIG_BT_SPI_CHIP_SELECT_DEV_NAME Chip Select (CS) line driver name
CONFIG_BT_SPI_CHIP_SELECT_PIN SPI Chip Select (CS) line number
CONFIG_BT_SPI_DEV_NAME Device Name of SPI Device for Bluetooth
CONFIG_BT_SPI_IRQ_DEV_NAME IRQ line driver name
CONFIG_BT_SPI_IRQ_PIN SPI IRQ line number
CONFIG_BT_SPI_MAX_CLK_FREQ Maximum clock frequency for the HCI SPI interface
CONFIG_BT_SPI_RESET_DEV_NAME Reset line driver name
CONFIG_BT_SPI_RESET_PIN SPI Reset line number
CONFIG_BT_TESTING Bluetooth Testing
CONFIG_BT_TINYCRYPT_ECC Use TinyCrypt library for ECDH
CONFIG_BT_UART  
CONFIG_BT_UART_ON_DEV_NAME Device Name of UART Device for Bluetooth
CONFIG_BT_USERCHAN HCI User Channel based driver
CONFIG_BT_USE_DEBUG_KEYS Enable Security Manager Debug Mode
CONFIG_BT_WAIT_NOP Wait for “NOP” Command Complete event during init
CONFIG_BUILD_OUTPUT_BIN Build a binary in BIN format
CONFIG_BUILD_OUTPUT_EXE Build a binary in ELF format with .exe extension
CONFIG_BUILD_OUTPUT_HEX Build a binary in HEX format
CONFIG_BUILD_OUTPUT_S19 Build a binary in S19 format
CONFIG_BUILD_OUTPUT_STRIPPED Build a stripped binary
CONFIG_BUILD_TIMESTAMP Build Timestamp
CONFIG_BUILTIN_STACK_GUARD Thread Stack Guards based on built-in ARM stack limit checking
CONFIG_BUSY_WAIT_USES_ALTERNATE_CLOCK Busy wait uses alternate clock in tickless kernel mode
CONFIG_CACHE_FLUSHING Enable d-cache flushing mechanism / Enable cache flushing mechanism
CONFIG_CACHE_LINE_SIZE Cache line size / Cache line size
CONFIG_CACHE_LINE_SIZE_DETECT Detect d-cache line size at runtime / Detect cache line size at runtime
CONFIG_CAN CAN Drivers
CONFIG_CAN_1 Enable CAN 1
CONFIG_CAN_INIT_PRIORITY CAN driver init priority
CONFIG_CAN_MAX_FILTER Maximum number of concurrent active filters
CONFIG_CAN_STM32 STM32 CAN Driver
CONFIG_CAVS_ICTL CAVS Interrupt Logic
CONFIG_CAVS_ICTL_0_NAME CAVS 0 Driver name
CONFIG_CAVS_ICTL_0_OFFSET Parent interrupt number to which CAVS_0 maps
CONFIG_CAVS_ICTL_1_NAME CAVS 1 Driver name
CONFIG_CAVS_ICTL_1_OFFSET Parent interrupt number to which CAVS_1 maps
CONFIG_CAVS_ICTL_2_NAME CAVS 2 Driver name
CONFIG_CAVS_ICTL_2_OFFSET Parent interrupt number to which CAVS_2 maps
CONFIG_CAVS_ICTL_3_NAME CAVS 3 Driver name
CONFIG_CAVS_ICTL_3_OFFSET Parent interrupt number to which CAVS_3 maps
CONFIG_CAVS_ICTL_INIT_PRIORITY CAVS ICTL Init priority
CONFIG_CAVS_ISR_TBL_OFFSET Offset in the SW ISR Table
CONFIG_CBOR_ENCODER_NO_CHECK_USER No encoder checks for user args for validity
CONFIG_CBOR_FLOATING_POINT Floating point support
CONFIG_CBOR_HALF_FLOAT_TYPE Half float type support
CONFIG_CBOR_NO_DFLT_READER No default reader support
CONFIG_CBOR_NO_DFLT_WRITER No default writer support
CONFIG_CBOR_PARSER_MAX_RECURSIONS Parser max recursions
CONFIG_CBOR_PARSER_NO_STRICT_CHECKS No strict parser checks
CONFIG_CBOR_WITHOUT_OPEN_MEMSTREAM Without open memstream
CONFIG_CC3220SF_DEBUG Prepend debug header, disabling flash verification
CONFIG_CCS811 CCS811 Digital Gas Sensor
CONFIG_CCS811_GPIO_DEV_NAME GPIO device
CONFIG_CCS811_GPIO_RESET Enable GPIO Reset for CCS811
CONFIG_CCS811_GPIO_RESET_PIN_NUM GPIO Reset pin number
CONFIG_CCS811_GPIO_WAKEUP Enable GPIO Wakeup for CCS811
CONFIG_CCS811_GPIO_WAKEUP_PIN_NUM GPIO Wakeup pin number
CONFIG_CCS811_I2C_ADDR I2C address for CCS811 Sensor
CONFIG_CCS811_I2C_MASTER_DEV_NAME I2C master where CCS811 is connected
CONFIG_CCS811_NAME Driver name
CONFIG_CDC_ACM_BULK_EP_MPS  
CONFIG_CDC_ACM_INTERRUPT_EP_MPS  
CONFIG_CDC_ACM_PORT_NAME CDC ACM class device driver port name
CONFIG_CDC_ECM_BULK_EP_MPS  
CONFIG_CDC_ECM_INTERRUPT_EP_MPS  
CONFIG_CDC_EEM_BULK_EP_MPS  
CONFIG_CHECK_LINK_MAP Check linker map
CONFIG_CLFLUSH_DETECT Detect support of CLFLUSH instruction at runtime
CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED CLFLUSH instruction supported
CONFIG_CLOCK_CONTROL Hardware clock controller support
CONFIG_CLOCK_CONTROL_BEETLE BEETLE Clock Control
CONFIG_CLOCK_CONTROL_BEETLE_DEVICE_INIT_PRIORITY Clock Control Device Priority
CONFIG_CLOCK_CONTROL_BEETLE_ENABLE_PLL Enable PLL on Beetle
CONFIG_CLOCK_CONTROL_IMX_CCM  
CONFIG_CLOCK_CONTROL_MCUX_CCM MCUX CCM driver
CONFIG_CLOCK_CONTROL_MCUX_SIM MCUX SIM driver
CONFIG_CLOCK_CONTROL_NRF5 NRF5 Clock controller support
CONFIG_CLOCK_CONTROL_NRF5_IRQ_PRIORITY Power Clock Interrupt Priority
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_100PPM 76 ppm to 100 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_150PPM 101 ppm to 150 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_20PPM 0 ppm to 20 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_250PPM 151 ppm to 250 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_30PPM 21 ppm to 30 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_500PPM 251 ppm to 500 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_50PPM 31 ppm to 50 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_75PPM 51 ppm to 75 ppm
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_BLOCKING Blocking 32KHz crystal oscillator startup
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME NRF5 32KHz clock device name
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_RC RC Oscillator
CONFIG_CLOCK_CONTROL_NRF5_K32SRC_XTAL Crystal Oscillator
CONFIG_CLOCK_CONTROL_NRF5_M16SRC_DRV_NAME NRF5 16MHz clock device name
CONFIG_CLOCK_CONTROL_QUARK_SE Quark SE Clock controller support
CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL Quark SE external clock support
CONFIG_CLOCK_CONTROL_QUARK_SE_EXTERNAL_DRV_NAME Quark SE external clock device name
CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL Quark SE peripheral clock support
CONFIG_CLOCK_CONTROL_QUARK_SE_PERIPHERAL_DRV_NAME Quark SE peripheral clock device name
CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR Quark SE sensor clock support
CONFIG_CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME Quark SE sensor clock device name
CONFIG_CLOCK_CONTROL_STM32_CUBE STM32 Reset & Clock Control
CONFIG_CLOCK_CONTROL_STM32_DEVICE_INIT_PRIORITY Clock Control Device Priority
CONFIG_CLOCK_STM32_AHB_PRESCALER AHB prescaler
CONFIG_CLOCK_STM32_APB1_PRESCALER APB1 prescaler
CONFIG_CLOCK_STM32_APB2_PRESCALER APB2 prescaler
CONFIG_CLOCK_STM32_HSE_BYPASS HSE bypass
CONFIG_CLOCK_STM32_HSE_CLOCK HSE clock value
CONFIG_CLOCK_STM32_MSI_RANGE MSI frequency range
CONFIG_CLOCK_STM32_PLL2_MULTIPLIER PLL2 multiplier
CONFIG_CLOCK_STM32_PLL2_PREDIV2 PREDIV2 Prescaler
CONFIG_CLOCK_STM32_PLL_DIVISOR PLL divisor
CONFIG_CLOCK_STM32_PLL_MULTIPLIER PLL multiplier / PLL multiplier / PLL multiplier / PLL multiplier
CONFIG_CLOCK_STM32_PLL_M_DIVISOR Division factor for PLL VCO input clock / Division factor for PLL VCO input clock / PLL divisor
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER Multiplier factor for PLL VCO output clock / Multiplier factor for PLL VCO output clock / PLL multiplier
CONFIG_CLOCK_STM32_PLL_PREDIV PREDIV Prescaler / PREDIV Prescaler
CONFIG_CLOCK_STM32_PLL_PREDIV1 PREDIV1 Prescaler / PREDIV1 Prescaler
CONFIG_CLOCK_STM32_PLL_P_DIVISOR PLL division factor for main system clock / PLL division factor for main system clock / PLL P Divisor
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR PLL division factor for USB OTG FS, SDIO and RNG clocks / Division factor for OTG FS, SDIO and RNG clocks / PLL Q Divisor
CONFIG_CLOCK_STM32_PLL_R_DIVISOR PLL R Divisor
CONFIG_CLOCK_STM32_PLL_SRC_HSE HSE
CONFIG_CLOCK_STM32_PLL_SRC_HSI HSI
CONFIG_CLOCK_STM32_PLL_SRC_MSI MSI
CONFIG_CLOCK_STM32_PLL_SRC_PLL2 PLL2
CONFIG_CLOCK_STM32_PLL_XTPRE HSE to PLL /2 prescaler
CONFIG_CLOCK_STM32_SYSCLK_SRC_HSE HSE
CONFIG_CLOCK_STM32_SYSCLK_SRC_HSI HSI
CONFIG_CLOCK_STM32_SYSCLK_SRC_MSI MSI
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL PLL
CONFIG_CMOV  
CONFIG_CMSIS_MAX_THREAD_COUNT Maximum thread count in CMSIS RTOS application
CONFIG_CMSIS_MUTEX_MAX_COUNT Maximum mutex count in CMSIS application
CONFIG_CMSIS_RTOS_V1 CMSIS RTOS v1 API
CONFIG_CMSIS_SEMAPHORE_MAX_COUNT Maximum semaphore count in CMSIS application
CONFIG_CMSIS_THREAD_MAX_STACK_SIZE Max stack size threads can be allocated in CMSIS RTOS application
CONFIG_CMSIS_TIMER_MAX_COUNT Maximum timer count in CMSIS application
CONFIG_CMU_HFCLK_HFRCO Internal high frequency RC oscillator
CONFIG_CMU_HFCLK_HFXO External high frequency crystal oscillator
CONFIG_CMU_HFCLK_LFXO External low frequency crystal oscillator
CONFIG_CMU_HFXO_FREQ External high frequency oscillator frequency
CONFIG_CMU_LFXO_FREQ External low frequency oscillator frequency
CONFIG_COAP CoAP Support
CONFIG_COAP_EXTENDED_OPTIONS_LEN Support for CoAP extended options
CONFIG_COAP_EXTENDED_OPTIONS_LEN_VALUE CoAP extended options length value
CONFIG_COAP_INIT_ACK_TIMEOUT_MS base length of the random generated initial ACK timeout in ms
CONFIG_COAP_TEST_API_ENABLE Enable test API for CoAP unit tests
CONFIG_COAP_WELL_KNOWN_BLOCK_WISE CoAP ./well-known/core services block wise support
CONFIG_COAP_WELL_KNOWN_BLOCK_WISE_SIZE CoAP ./well-known/core services block wise support
CONFIG_CODE_DENSITY Code Density Option
CONFIG_CODE_HYPERFLASH Link code into external HyperFlash memory
CONFIG_CODE_ITCM Link code into internal instruction tightly coupled memory (ITCM)
CONFIG_CODE_QSPI Link code into external QSPI memory
CONFIG_COMPILER_OPT Custom compiler options
CONFIG_CONSOLE Console drivers
CONFIG_CONSOLE_GETCHAR Character by character input and output
CONFIG_CONSOLE_GETCHAR_BUFSIZE console_getchar() buffer size
CONFIG_CONSOLE_GETLINE Line by line input
CONFIG_CONSOLE_HANDLER Enable console input handler
CONFIG_CONSOLE_HAS_DRIVER  
CONFIG_CONSOLE_INPUT_MAX_LINE_LEN Console maximum input line length
CONFIG_CONSOLE_PUTCHAR_BUFSIZE console_putchar() buffer size
CONFIG_CONSOLE_SHELL Enable console input handler [ Experimental ]
CONFIG_CONSOLE_SHELL_MAX_CMD_QUEUED Shell’s command queue size
CONFIG_CONSOLE_SHELL_STACKSIZE Console handler shell stack size
CONFIG_CONSOLE_SUBSYS Console subsystem/support routines [EXPERIMENTAL]
CONFIG_COOP_ENABLED  
CONFIG_CORTEX_M_SYSTICK Cortex-M SYSTICK timer
CONFIG_COUNTER Counter Drivers
CONFIG_COUNTER_DTMR_CMSDK_APB ARM CMSDK (Cortex-M System Design Kit) DTMR Counter driver
CONFIG_COUNTER_DTMR_CMSDK_APB_0 Counter 0 driver
CONFIG_COUNTER_DTMR_CMSDK_APB_0_DEV_NAME Counter 0 Device Name
CONFIG_COUNTER_TMR_CMSDK_APB ARM CMSDK (Cortex-M System Design Kit) Counter driver
CONFIG_COUNTER_TMR_CMSDK_APB_0 Counter 0 driver
CONFIG_COUNTER_TMR_CMSDK_APB_0_DEV_NAME Counter 0 Device Name
CONFIG_COUNTER_TMR_CMSDK_APB_1 Counter 1 driver
CONFIG_COUNTER_TMR_CMSDK_APB_1_DEV_NAME Counter 1 Device Name
CONFIG_COVERAGE Create coverage data
CONFIG_CPLUSPLUS Enable C++ support for the application
CONFIG_CPU_APOLLO_LAKE  
CONFIG_CPU_ARCEM4  
CONFIG_CPU_ARCV2  
CONFIG_CPU_ATOM  
CONFIG_CPU_CLOCK_FREQ_MHZ CPU Clock Frequency in MHz
CONFIG_CPU_CORTEX  
CONFIG_CPU_CORTEX_M  
CONFIG_CPU_CORTEX_M0  
CONFIG_CPU_CORTEX_M0PLUS  
CONFIG_CPU_CORTEX_M0_HAS_VECTOR_TABLE_REMAP  
CONFIG_CPU_CORTEX_M23  
CONFIG_CPU_CORTEX_M3  
CONFIG_CPU_CORTEX_M33  
CONFIG_CPU_CORTEX_M4  
CONFIG_CPU_CORTEX_M7  
CONFIG_CPU_CORTEX_M_HAS_BASEPRI  
CONFIG_CPU_CORTEX_M_HAS_CMSE  
CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS  
CONFIG_CPU_CORTEX_M_HAS_SPLIM  
CONFIG_CPU_CORTEX_M_HAS_VTOR  
CONFIG_CPU_EM4_DMIPS  
CONFIG_CPU_EM4_FPUDA  
CONFIG_CPU_EM4_FPUS  
CONFIG_CPU_HAS_FPU  
CONFIG_CPU_HAS_MPU  
CONFIG_CPU_HAS_SYSTICK  
CONFIG_CPU_MINUTEIA  
CONFIG_CPU_NIOS2_GEN2  
CONFIG_CROSS_COMPILE Cross-compiler tool prefix
CONFIG_CRYPTO Crypto Drivers [EXPERIMENTAL]
CONFIG_CRYPTO_ATAES132A Atmel ATAES132A 32k AES Serial EEPROM support
CONFIG_CRYPTO_ATAES132A_DRV_NAME Driver’s name
CONFIG_CRYPTO_ATAES132A_I2C_ADDR ATAES132A I2C address
CONFIG_CRYPTO_ATAES132A_I2C_PORT_NAME I2C master controller port name
CONFIG_CRYPTO_ATAES132A_I2C_SPEED_FAST Fast
CONFIG_CRYPTO_ATAES132A_I2C_SPEED_STANDARD Standard
CONFIG_CRYPTO_INIT_PRIORITY Crypto devices init priority
CONFIG_CRYPTO_MBEDTLS_SHIM Enable mbedTLS shim driver [EXPERIMENTAL]
CONFIG_CRYPTO_MBEDTLS_SHIM_DRV_NAME Device name for mbedTLS Pseudo device
CONFIG_CRYPTO_MBEDTLS_SHIM_MAX_SESSION Maximum of sessions mbedTLS shim driver can handle
CONFIG_CRYPTO_TINYCRYPT_SHIM Enable TinyCrypt shim driver [EXPERIMENTAL]
CONFIG_CRYPTO_TINYCRYPT_SHIM_DRV_NAME Device name for TinyCrypt Pseudo device
CONFIG_CRYPTO_TINYCRYPT_SHIM_MAX_SESSION Maximum of sessions TinyCrypt shim driver can handle
CONFIG_CUSTOM_LINKER_SCRIPT Path to custom linker script
CONFIG_CUSTOM_RODATA_LD Include custom-rodata.ld
CONFIG_CUSTOM_RWDATA_LD Include custom-rwdata.ld
CONFIG_CUSTOM_SECTIONS_LD Include custom-sections.ld
CONFIG_DATA_ENDIANNESS_LITTLE  
CONFIG_DCACHE_WRITEBACK Data Cache Writeback
CONFIG_DEBUG Build kernel with debugging enabled
CONFIG_DEBUG_INFO Enable system debugging information
CONFIG_DEBUG_OPTIMIZATIONS Optimize debugging experience
CONFIG_DEVICE_POWER_MANAGEMENT Device power management
CONFIG_DHT DHT Temperature and Humidity Sensor
CONFIG_DHT_CHIP_DHT11 DHT11
CONFIG_DHT_CHIP_DHT22 DHT22
CONFIG_DHT_GPIO_DEV_NAME GPIO device
CONFIG_DHT_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_DHT_NAME Driver name
CONFIG_DISABLE_SSBD Disable Speculative Store Bypass
CONFIG_DISK_ACCESS Enable Disk Interface
CONFIG_DISK_ACCESS_FLASH Flash
CONFIG_DISK_ACCESS_MAX_VOLUMES Maximum Disk Interfaces
CONFIG_DISK_ACCESS_RAM RAM Disk
CONFIG_DISK_ERASE_BLOCK_SIZE Flash device erasable block size in hex
CONFIG_DISK_FLASH_DEV_NAME Flash device name to be used as storage backend
CONFIG_DISK_FLASH_ERASE_ALIGNMENT Flash device erase alignment in hex
CONFIG_DISK_FLASH_MAX_RW_SIZE Flash device max read-write size in decimal
CONFIG_DISK_FLASH_START Flash device start address in hex
CONFIG_DISK_FLASH_VOLUME_NAME Flash mount point or drive name
CONFIG_DISK_RAM_VOLUME_NAME RAM Disk mount point or drive name
CONFIG_DISK_VOLUME_SIZE Flash device volume size in hex
CONFIG_DISPLAY Display Drivers
CONFIG_DMA DMA driver Configuration
CONFIG_DMA_0_IRQ_PRI IRQ Priority for DMA Controller 0
CONFIG_DMA_0_NAME Device name for DMA Controller 0
CONFIG_DMA_1_IRQ_PRI IRQ Priority for DMA Controller 1
CONFIG_DMA_1_NAME Device name for DMA Controller 1
CONFIG_DMA_2_IRQ_PRI IRQ Priority for DMA Controller 2
CONFIG_DMA_2_NAME Device name for DMA Controller 2
CONFIG_DMA_CAVS Enable CAVS DMA driver
CONFIG_DMA_NIOS2_MSGDMA Nios-II Modular Scatter-Gather DMA(MSGDMA) driver
CONFIG_DMA_QMSI Enable QMSI DMA driver
CONFIG_DMA_SAM_XDMAC Atmel SAM DMA (XDMAC) driver
CONFIG_DMA_STM32F4X Enable STM32F4x DMA driver
CONFIG_DNS_NUM_CONCUR_QUERIES Number of simultaneous DNS queries per one DNS context
CONFIG_DNS_RESOLVER DNS resolver
CONFIG_DNS_RESOLVER_ADDITIONAL_BUF_CTR Additional DNS buffers
CONFIG_DNS_RESOLVER_ADDITIONAL_QUERIES Additional DNS queries
CONFIG_DNS_RESOLVER_MAX_SERVERS Number of DNS server addresses
CONFIG_DNS_SERVER1 DNS server 1
CONFIG_DNS_SERVER2 DNS server 2
CONFIG_DNS_SERVER3 DNS server 3
CONFIG_DNS_SERVER4 DNS server 4
CONFIG_DNS_SERVER5 DNS server 5
CONFIG_DNS_SERVER_IP_ADDRESSES Set DNS server IP addresses
CONFIG_DTCM_BASE_ADDRESS  
CONFIG_DTCM_SIZE  
CONFIG_DW_ICTL Designware Interrupt Controller
CONFIG_DW_ICTL_INIT_PRIORITY Init priority for DW interrupt controller
CONFIG_DW_ICTL_NAME Name for Designware Interrupt Controller
CONFIG_DW_ICTL_OFFSET Parent interrupt number to which DW_ICTL maps
CONFIG_DW_ISR_TBL_OFFSET Offset in the SW ISR Table
CONFIG_DYNAMIC_OBJECTS Allow kernel objects to be allocated at runtime
CONFIG_EARLY_CONSOLE Send stdout at the earliest stage possible
CONFIG_ENTROPY_DEVICE_RANDOM_GENERATOR Use entropy driver to generate random numbers
CONFIG_ENTROPY_ESP32_RNG ESP32 entropy number generator driver
CONFIG_ENTROPY_GENERATOR Entropy Drivers
CONFIG_ENTROPY_HAS_DRIVER  
CONFIG_ENTROPY_MCUX_RNGA MCUX RNGA driver
CONFIG_ENTROPY_MCUX_TRNG MCUX TRNG driver
CONFIG_ENTROPY_NAME Entropy Device Name
CONFIG_ENTROPY_NRF5_BIAS_CORRECTION Enable bias correction (uniform distribution)
CONFIG_ENTROPY_NRF5_ISR_BUF_LEN ISR buffer length
CONFIG_ENTROPY_NRF5_ISR_THRESHOLD ISR low-water threshold
CONFIG_ENTROPY_NRF5_PRI RNG interrupt priority
CONFIG_ENTROPY_NRF5_RNG nRF5 RNG driver
CONFIG_ENTROPY_NRF5_THR_BUF_LEN Thread-mode buffer length
CONFIG_ENTROPY_NRF5_THR_THRESHOLD Thread-mode low-water threshold
CONFIG_ENTROPY_STM32_RNG STM32 RNG driver
CONFIG_EOI_FORWARDING_BUG  
CONFIG_ERRNO Enable errno support
CONFIG_ETH_DW Synopsys DesignWare Ethernet driver
CONFIG_ETH_DW_0 Synopsys DesignWare Ethernet port 0
CONFIG_ETH_DW_0_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_ETH_DW_0_IRQ_PRI Controller interrupt priority
CONFIG_ETH_DW_0_IRQ_SHARED Shared IRQ
CONFIG_ETH_DW_0_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_ETH_DW_0_NAME Driver name
CONFIG_ETH_DW_SHARED_IRQ  
CONFIG_ETH_EN28J60_0_FULL_DUPLEX ENC28J60 full duplex
CONFIG_ETH_EN28J60_TIMEOUT IP buffer timeout
CONFIG_ETH_ENC28J60 ENC28J60C Ethernet Controller
CONFIG_ETH_ENC28J60_0 ENC28J60C Ethernet port 0
CONFIG_ETH_ENC28J60_0_GPIO_PIN ENC28J60C INT GPIO PIN
CONFIG_ETH_ENC28J60_0_GPIO_PORT_NAME GPIO controller port name
CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS Manage SPI CS through a GPIO pin
CONFIG_ETH_ENC28J60_0_MAC3 MAC Address Byte 3
CONFIG_ETH_ENC28J60_0_MAC4 MAC Address Byte 4
CONFIG_ETH_ENC28J60_0_MAC5 MAC Address Byte 5
CONFIG_ETH_ENC28J60_0_NAME Driver’s name
CONFIG_ETH_ENC28J60_0_SLAVE ETH_ENC28J60 SPI slave select pin
CONFIG_ETH_ENC28J60_0_SPI_BUS_FREQ ENC28J60C SPI bus speed in Hz
CONFIG_ETH_ENC28J60_0_SPI_CS_PIN SPI CS pin
CONFIG_ETH_ENC28J60_0_SPI_CS_PORT_NAME SPI cs port name
CONFIG_ETH_ENC28J60_0_SPI_PORT_NAME SPI master controller port name
CONFIG_ETH_ENC28J60_RX_THREAD_PRIO Priority for internal incoming packet handler
CONFIG_ETH_ENC28J60_RX_THREAD_STACK_SIZE Stack size for internal incoming packet handler
CONFIG_ETH_INIT_PRIORITY Ethernet driver init priority
CONFIG_ETH_MCUX MCUX Ethernet driver
CONFIG_ETH_MCUX_0 MCUX Ethernet port 0
CONFIG_ETH_MCUX_0_IRQ_PRI Controller interrupt priority
CONFIG_ETH_MCUX_0_MAC3 MAC Address Byte 3
CONFIG_ETH_MCUX_0_MAC4 MAC Address Byte 4
CONFIG_ETH_MCUX_0_MAC5 MAC Address Byte 5
CONFIG_ETH_MCUX_0_MANUAL_MAC Manual MAC address
CONFIG_ETH_MCUX_0_NAME Driver name
CONFIG_ETH_MCUX_0_RANDOM_MAC Random MAC address
CONFIG_ETH_MCUX_0_UNIQUE_MAC Stable MAC address
CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG Enable additional detailed PHY debug
CONFIG_ETH_MCUX_PHY_TICK_MS PHY poll period (ms)
CONFIG_ETH_MCUX_PROMISCUOUS_MODE Enable promiscuous mode
CONFIG_ETH_MCUX_PTP_CLOCK_SRC_HZ Frequency of the clock source for the PTP timer
CONFIG_ETH_MCUX_PTP_RX_BUFFERS Size of the RX timestamp ring buffer
CONFIG_ETH_MCUX_PTP_TX_BUFFERS Size of the TX timestamp ring buffer
CONFIG_ETH_MCUX_RX_BUFFERS Number of MCUX RX buffers
CONFIG_ETH_MCUX_TX_BUFFERS Number of MCUX TX buffers
CONFIG_ETH_NATIVE_POSIX Native Posix Ethernet driver
CONFIG_ETH_NATIVE_POSIX_DEV_NAME Host ethernet TUN/TAP device name
CONFIG_ETH_NATIVE_POSIX_DRV_NAME Ethernet driver name
CONFIG_ETH_NATIVE_POSIX_MAC_ADDR MAC address for the interface
CONFIG_ETH_NATIVE_POSIX_PTP_CLOCK PTP clock driver support
CONFIG_ETH_NATIVE_POSIX_RANDOM_MAC Random MAC address
CONFIG_ETH_NATIVE_POSIX_SETUP_SCRIPT Host setup script
CONFIG_ETH_NATIVE_POSIX_STARTUP_SCRIPT Host startup script
CONFIG_ETH_NATIVE_POSIX_STARTUP_SCRIPT_USER Username to run the host startup script
CONFIG_ETH_SAM_GMAC Atmel SAM Ethernet driver
CONFIG_ETH_SAM_GMAC_BUF_RX_COUNT Network RX buffers preallocated by the SAM ETH driver
CONFIG_ETH_SAM_GMAC_IRQ_PRI Interrupt priority
CONFIG_ETH_SAM_GMAC_MAC0 MAC Address Byte 0
CONFIG_ETH_SAM_GMAC_MAC1 MAC Address Byte 1
CONFIG_ETH_SAM_GMAC_MAC2 MAC Address Byte 2
CONFIG_ETH_SAM_GMAC_MAC3 MAC Address Byte 3
CONFIG_ETH_SAM_GMAC_MAC4 MAC Address Byte 4
CONFIG_ETH_SAM_GMAC_MAC5 MAC Address Byte 5
CONFIG_ETH_SAM_GMAC_MAC_I2C_DEV_NAME I2C bus driver device name
CONFIG_ETH_SAM_GMAC_MAC_I2C_EEPROM Read from an I2C EEPROM
CONFIG_ETH_SAM_GMAC_MAC_I2C_INT_ADDRESS I2C EEPROM internal address
CONFIG_ETH_SAM_GMAC_MAC_I2C_INT_ADDRESS_SIZE I2C EEPROM internal address size
CONFIG_ETH_SAM_GMAC_MAC_I2C_SLAVE_ADDRESS I2C 7-bit EEPROM chip address
CONFIG_ETH_SAM_GMAC_MAC_MANUAL Manual
CONFIG_ETH_SAM_GMAC_MII MII
CONFIG_ETH_SAM_GMAC_NAME Device name
CONFIG_ETH_SAM_GMAC_PHY_ADDR GMAC PHY Address
CONFIG_ETH_SAM_GMAC_QUEUES Number of hardware TX and RX queues
CONFIG_ETH_SAM_GMAC_RMII RMII
CONFIG_ETH_SAM_GMAC_TX_TIMEOUT_MSEC TX timeout
CONFIG_ETH_STM32_HAL STM32 HAL Ethernet driver
CONFIG_ETH_STM32_HAL_IRQ_PRI Controller interrupt priority
CONFIG_ETH_STM32_HAL_MAC3 MAC Address Byte 3
CONFIG_ETH_STM32_HAL_MAC4 MAC Address Byte 4
CONFIG_ETH_STM32_HAL_MAC5 MAC Address Byte 5
CONFIG_ETH_STM32_HAL_NAME Device name
CONFIG_ETH_STM32_HAL_PHY_ADDRESS Phy address
CONFIG_ETH_STM32_HAL_RANDOM_MAC Random MAC address
CONFIG_ETH_STM32_HAL_RX_THREAD_PRIO RX thread priority
CONFIG_ETH_STM32_HAL_RX_THREAD_STACK_SIZE RX thread stack size
CONFIG_EXCEPTION_DEBUG Unhandled exception debugging
CONFIG_EXCEPTION_STACK_TRACE Attempt to print stack traces upon exceptions
CONFIG_EXECUTE_XOR_WRITE Enable W^X for memory partitions
CONFIG_EXECUTION_BENCHMARKING Timing metrics
CONFIG_EXTI_STM32 External Interrupt/Event Controller (EXTI) Driver for STM32 family of MCUs
CONFIG_EXTI_STM32_EXTI0_IRQ_PRI EXTI0 IRQ priority
CONFIG_EXTI_STM32_EXTI15_10_IRQ_PRI EXTI15:10 IRQ priority
CONFIG_EXTI_STM32_EXTI15_4_IRQ_PRI EXTI15:4 IRQ priority
CONFIG_EXTI_STM32_EXTI1_0_IRQ_PRI EXTI1:0 IRQ priority
CONFIG_EXTI_STM32_EXTI1_IRQ_PRI EXTI1 IRQ priority
CONFIG_EXTI_STM32_EXTI2_IRQ_PRI EXTI2 IRQ priority
CONFIG_EXTI_STM32_EXTI3_2_IRQ_PRI EXTI3:2 IRQ priority
CONFIG_EXTI_STM32_EXTI3_IRQ_PRI EXTI3 IRQ priority
CONFIG_EXTI_STM32_EXTI4_IRQ_PRI EXTI4 IRQ priority
CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI EXTI9:5 IRQ priority
CONFIG_EXTI_STM32_LPTIM1_IRQ_PRI LPTIM1 IRQ priority
CONFIG_EXTI_STM32_OTG_FS_WKUP_IRQ_PRI USB OTG FS Wake Up IRQ priority
CONFIG_EXTI_STM32_PVD_IRQ_PRI RVD Through IRQ priority
CONFIG_EXTI_STM32_RTC_ALARM_IRQ_PRI RTC Alarm IRQ priority
CONFIG_EXTI_STM32_RTC_WKUP_IRQ_PRI RTC Wake Up IRQ priority
CONFIG_EXTI_STM32_TAMP_STAMP_IRQ_PRI Tamper and Timestamp IRQ priority
CONFIG_EXTRA_EXCEPTION_INFO Extra exception debug information
CONFIG_FAKE_ENTROPY_NATIVE_POSIX Native posix entropy driver
CONFIG_FAT_FILESYSTEM_ELM ELM FAT File System
CONFIG_FAULT_DUMP Fault dump level / Fault dump level
CONFIG_FCB Flash Circular Buffer support
CONFIG_FILE_SYSTEM File system support
CONFIG_FILE_SYSTEM_NFFS NFFS file system support
CONFIG_FILE_SYSTEM_SHELL Enable file system shell
CONFIG_FLASH Flash hardware support
CONFIG_FLASH_HAS_DRIVER_ENABLED  
CONFIG_FLASH_HAS_PAGE_LAYOUT  
CONFIG_FLASH_LOAD_OFFSET Kernel load offset
CONFIG_FLASH_LOAD_SIZE Kernel load size
CONFIG_FLASH_MAP Flash map abstraction module
CONFIG_FLASH_MAP_CUSTOM Custom flash map description
CONFIG_FLASH_PAGE_LAYOUT API for retrieving the layout of pages
CONFIG_FLASH_PAGE_SIZE  
CONFIG_FLOAT Floating point registers
CONFIG_FORCE_NO_ASSERT Force-disable no assertions
CONFIG_FP_FPU_DA  
CONFIG_FP_HARDABI Floating point Hard ABI
CONFIG_FP_SHARING Floating point register sharing
CONFIG_FP_SOFTABI Floating point Soft ABI
CONFIG_FS_FATFS_NUM_DIRS Maximum number of opened directories
CONFIG_FS_FATFS_NUM_FILES Maximum number of opened files
CONFIG_FS_FLASH_STORAGE_PARTITION  
CONFIG_FS_MGMT_DL_CHUNK_SIZE Maximum chunk size for file downloads
CONFIG_FS_MGMT_PATH_SIZE Maximum file path length
CONFIG_FS_MGMT_UL_CHUNK_SIZE Maximum chunk size for file uploads
CONFIG_FS_NFFS_FLASH_DEV_NAME Flash device name to be used
CONFIG_FS_NFFS_NUM_BLOCKS Maximum number of blocks
CONFIG_FS_NFFS_NUM_CACHE_BLOCKS Number of cached blocks
CONFIG_FS_NFFS_NUM_CACHE_INODES Number of cached files’ inodes
CONFIG_FS_NFFS_NUM_DIRS Maximum number of opened directories
CONFIG_FS_NFFS_NUM_FILES Maximum number of opened files
CONFIG_FS_NFFS_NUM_INODES Maximum number of inodes
CONFIG_FXAS21002 FXAS21002 gyroscope driver
CONFIG_FXAS21002_DR Output data rate
CONFIG_FXAS21002_DRDY_INT1 Data ready interrupt to INT1 pin
CONFIG_FXAS21002_GPIO_NAME GPIO device name
CONFIG_FXAS21002_GPIO_PIN GPIO pin
CONFIG_FXAS21002_I2C_ADDRESS I2C address
CONFIG_FXAS21002_I2C_NAME I2C device name
CONFIG_FXAS21002_NAME Device name
CONFIG_FXAS21002_RANGE Full scale range
CONFIG_FXAS21002_THREAD_PRIORITY Own thread priority
CONFIG_FXAS21002_THREAD_STACK_SIZE Own thread stack size
CONFIG_FXAS21002_TRIGGER  
CONFIG_FXAS21002_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_FXAS21002_TRIGGER_NONE No trigger
CONFIG_FXAS21002_TRIGGER_OWN_THREAD Use own thread
CONFIG_FXAS21002_WHOAMI WHOAMI value
CONFIG_FXOS8700 FXOS8700 accelerometer/magnetometer driver
CONFIG_FXOS8700_DRDY_INT1 Data ready interrupt to INT1 pin
CONFIG_FXOS8700_GPIO_NAME GPIO device name
CONFIG_FXOS8700_GPIO_PIN GPIO pin
CONFIG_FXOS8700_I2C_ADDRESS I2C address
CONFIG_FXOS8700_I2C_NAME I2C device name
CONFIG_FXOS8700_MODE_ACCEL Accelerometer-only mode
CONFIG_FXOS8700_MODE_HYBRID Hybrid (accel+mag) mode
CONFIG_FXOS8700_MODE_MAGN Magnetometer-only mode
CONFIG_FXOS8700_NAME Device name
CONFIG_FXOS8700_PULSE Pulse detection
CONFIG_FXOS8700_PULSE_CFG Pulse configuration register
CONFIG_FXOS8700_PULSE_INT1 Pulse interrupt to INT1 pin
CONFIG_FXOS8700_PULSE_LTCY Pulse latency
CONFIG_FXOS8700_PULSE_THSX Pulse X-axis threshold
CONFIG_FXOS8700_PULSE_THSY Pulse Y-axis threshold
CONFIG_FXOS8700_PULSE_THSZ Pulse Z-axis threshold
CONFIG_FXOS8700_PULSE_TMLT Pulse time limit
CONFIG_FXOS8700_PULSE_WIND Pulse window
CONFIG_FXOS8700_RANGE_2G 2g (0.244 mg/LSB)
CONFIG_FXOS8700_RANGE_4G 4g (0.488 mg/LSB)
CONFIG_FXOS8700_RANGE_8G 8g (0.976 mg/LSB)
CONFIG_FXOS8700_TEMP Enable temperature
CONFIG_FXOS8700_THREAD_PRIORITY Own thread priority
CONFIG_FXOS8700_THREAD_STACK_SIZE Own thread stack size
CONFIG_FXOS8700_TRIGGER  
CONFIG_FXOS8700_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_FXOS8700_TRIGGER_NONE No trigger
CONFIG_FXOS8700_TRIGGER_OWN_THREAD Use own thread
CONFIG_FXOS8700_WHOAMI WHOAMI value
CONFIG_GDT_DYNAMIC Store GDT in RAM so that it can be modified
CONFIG_GEN_IRQ_START_VECTOR  
CONFIG_GEN_IRQ_VECTOR_TABLE Generate an interrupt vector table
CONFIG_GEN_ISR_TABLES Use generated IRQ tables
CONFIG_GEN_SW_ISR_TABLE Generate a software ISR table
CONFIG_GPIO GPIO Drivers
CONFIG_GPIOTE_NRF5_IRQ GPIOTE interrupt number
CONFIG_GPIOTE_NRF5_IRQ_PRI GPIOTE interrupt priority
CONFIG_GPIO_ALTERA_NIOS2 Altera Nios-II PIO Controllers
CONFIG_GPIO_ALTERA_NIOS2_OUTPUT Enable driver for Altera Nios-II PIO Output Port
CONFIG_GPIO_ALTERA_NIOS2_OUTPUT_DEV_NAME Device name for Output Port
CONFIG_GPIO_AS_PINRESET GPIO as pin reset (reset button)
CONFIG_GPIO_ATMEL_SAM3 Atmel SAM3 PIO Controllers
CONFIG_GPIO_ATMEL_SAM3_PORTA Enable driver for Atmel SAM3 PIO Port A
CONFIG_GPIO_ATMEL_SAM3_PORTA_DEV_NAME Device name for Port A
CONFIG_GPIO_ATMEL_SAM3_PORTA_IRQ_PRI Interrupt Priority for Port A
CONFIG_GPIO_ATMEL_SAM3_PORTB Enable driver for Atmel SAM3 PIO Port B
CONFIG_GPIO_ATMEL_SAM3_PORTB_DEV_NAME Device name for Port B
CONFIG_GPIO_ATMEL_SAM3_PORTB_IRQ_PRI Interrupt Priority for Port B
CONFIG_GPIO_ATMEL_SAM3_PORTC Enable driver for Atmel SAM3 PIO Port C
CONFIG_GPIO_ATMEL_SAM3_PORTC_DEV_NAME Device name for Port C
CONFIG_GPIO_ATMEL_SAM3_PORTC_IRQ_PRI Interrupt Priority for Port C
CONFIG_GPIO_ATMEL_SAM3_PORTD Enable driver for Atmel SAM3 PIO Port D
CONFIG_GPIO_ATMEL_SAM3_PORTD_DEV_NAME Device name for Port D
CONFIG_GPIO_ATMEL_SAM3_PORTD_IRQ_PRI Interrupt Priority for Port D
CONFIG_GPIO_CC2650 TI CC2650 GPIO driver
CONFIG_GPIO_CC2650_INIT_PRIO GPIO driver initialization priority.
CONFIG_GPIO_CC2650_NAME GPIO driver name.
CONFIG_GPIO_CC32XX TI CC32XX GPIO driver
CONFIG_GPIO_CC32XX_A0 GPIO block A0
CONFIG_GPIO_CC32XX_A0_IRQ_PRI GPIO A0 interrupt priority
CONFIG_GPIO_CC32XX_A0_NAME Driver name
CONFIG_GPIO_CC32XX_A1 GPIO block A1
CONFIG_GPIO_CC32XX_A1_IRQ_PRI GPIO A1 interrupt priority
CONFIG_GPIO_CC32XX_A1_NAME Driver name
CONFIG_GPIO_CC32XX_A2 GPIO block A2
CONFIG_GPIO_CC32XX_A2_IRQ_PRI GPIO A2 interrupt priority
CONFIG_GPIO_CC32XX_A2_NAME Driver name
CONFIG_GPIO_CC32XX_A3 GPIO block A3
CONFIG_GPIO_CC32XX_A3_IRQ_PRI GPIO A3 interrupt priority
CONFIG_GPIO_CC32XX_A3_NAME Driver name
CONFIG_GPIO_CMSDK_AHB ARM CMSDK (Cortex-M System Design Kit) AHB GPIO Controllers
CONFIG_GPIO_CMSDK_AHB_PORT0 Enable driver for GPIO Port 0
CONFIG_GPIO_CMSDK_AHB_PORT0_DEV_NAME Device name for Port 0
CONFIG_GPIO_CMSDK_AHB_PORT0_IRQ_PRI Interrupt Priority for Port 0
CONFIG_GPIO_CMSDK_AHB_PORT1 Enable driver for GPIO Port 1
CONFIG_GPIO_CMSDK_AHB_PORT1_DEV_NAME Device name for Port 1
CONFIG_GPIO_CMSDK_AHB_PORT1_IRQ_PRI Interrupt Priority for Port 1
CONFIG_GPIO_CMSDK_AHB_PORT2 Enable driver for GPIO Port 2
CONFIG_GPIO_CMSDK_AHB_PORT2_DEV_NAME Device name for Port 2
CONFIG_GPIO_CMSDK_AHB_PORT2_IRQ_PRI Interrupt Priority for Port 2
CONFIG_GPIO_CMSDK_AHB_PORT3 Enable driver for GPIO Port 3
CONFIG_GPIO_CMSDK_AHB_PORT3_DEV_NAME Device name for Port 3
CONFIG_GPIO_CMSDK_AHB_PORT3_IRQ_PRI Interrupt Priority for Port 3
CONFIG_GPIO_DW Designware GPIO
CONFIG_GPIO_DW_0 Designware GPIO block 0
CONFIG_GPIO_DW_0_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_0_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_0_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_0_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_0_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_0_NAME Driver name
CONFIG_GPIO_DW_1 Designware GPIO block 1
CONFIG_GPIO_DW_1_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_1_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_1_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_1_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_1_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_1_NAME Driver name
CONFIG_GPIO_DW_2 Designware GPIO block 1
CONFIG_GPIO_DW_2_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_2_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_2_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_2_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_2_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_2_NAME Driver name
CONFIG_GPIO_DW_3 Designware GPIO block 1
CONFIG_GPIO_DW_3_CLOCK_GATE_SUBSYS Clock controller’s subsystem
CONFIG_GPIO_DW_3_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_GPIO_DW_3_IRQ_PRI Controller interrupt priority
CONFIG_GPIO_DW_3_IRQ_SHARED Shared IRQ
CONFIG_GPIO_DW_3_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_GPIO_DW_3_NAME Driver name
CONFIG_GPIO_DW_CLOCK_GATE Enable clock gating
CONFIG_GPIO_DW_CLOCK_GATE_DRV_NAME  
CONFIG_GPIO_DW_INIT_PRIORITY Init priority
CONFIG_GPIO_DW_SHARED_IRQ  
CONFIG_GPIO_ESP32 ESP32 GPIO
CONFIG_GPIO_ESP32_0 ESP32 GPIO (pins 0-31)
CONFIG_GPIO_ESP32_0_NAME Driver name
CONFIG_GPIO_ESP32_1 ESP32 GPIO (pins 32-39)
CONFIG_GPIO_ESP32_1_NAME Driver name
CONFIG_GPIO_ESP32_IRQ IRQ line for ESP32 GPIO pins
CONFIG_GPIO_FE310 SiFive Freedom E310 Processor GPIO driver
CONFIG_GPIO_FE310_0_PRIORITY GPIO 0 interrupt priority
CONFIG_GPIO_FE310_10_PRIORITY GPIO 10 interrupt priority
CONFIG_GPIO_FE310_11_PRIORITY GPIO 11 interrupt priority
CONFIG_GPIO_FE310_12_PRIORITY GPIO 12 interrupt priority
CONFIG_GPIO_FE310_13_PRIORITY GPIO 13 interrupt priority
CONFIG_GPIO_FE310_14_PRIORITY GPIO 14 interrupt priority
CONFIG_GPIO_FE310_15_PRIORITY GPIO 15 interrupt priority
CONFIG_GPIO_FE310_16_PRIORITY GPIO 16 interrupt priority
CONFIG_GPIO_FE310_17_PRIORITY GPIO 17 interrupt priority
CONFIG_GPIO_FE310_18_PRIORITY GPIO 18 interrupt priority
CONFIG_GPIO_FE310_19_PRIORITY GPIO 19 interrupt priority
CONFIG_GPIO_FE310_1_PRIORITY GPIO 1 interrupt priority
CONFIG_GPIO_FE310_20_PRIORITY GPIO 20 interrupt priority
CONFIG_GPIO_FE310_21_PRIORITY GPIO 21 interrupt priority
CONFIG_GPIO_FE310_22_PRIORITY GPIO 22 interrupt priority
CONFIG_GPIO_FE310_23_PRIORITY GPIO 23 interrupt priority
CONFIG_GPIO_FE310_24_PRIORITY GPIO 24 interrupt priority
CONFIG_GPIO_FE310_25_PRIORITY GPIO 25 interrupt priority
CONFIG_GPIO_FE310_26_PRIORITY GPIO 26 interrupt priority
CONFIG_GPIO_FE310_27_PRIORITY GPIO 27 interrupt priority
CONFIG_GPIO_FE310_28_PRIORITY GPIO 28 interrupt priority
CONFIG_GPIO_FE310_29_PRIORITY GPIO 29 interrupt priority
CONFIG_GPIO_FE310_2_PRIORITY GPIO 2 interrupt priority
CONFIG_GPIO_FE310_30_PRIORITY GPIO 30 interrupt priority
CONFIG_GPIO_FE310_31_PRIORITY GPIO 31 interrupt priority
CONFIG_GPIO_FE310_3_PRIORITY GPIO 3 interrupt priority
CONFIG_GPIO_FE310_4_PRIORITY GPIO 4 interrupt priority
CONFIG_GPIO_FE310_5_PRIORITY GPIO 5 interrupt priority
CONFIG_GPIO_FE310_6_PRIORITY GPIO 6 interrupt priority
CONFIG_GPIO_FE310_7_PRIORITY GPIO 7 interrupt priority
CONFIG_GPIO_FE310_8_PRIORITY GPIO 8 interrupt priority
CONFIG_GPIO_FE310_9_PRIORITY GPIO 9 interrupt priority
CONFIG_GPIO_FE310_GPIO_NAME GPIO driver name
CONFIG_GPIO_GECKO Gecko GPIO driver
CONFIG_GPIO_GECKO_COMMON_INIT_PRIORITY Common initialization priority
CONFIG_GPIO_GECKO_COMMON_NAME Common driver name
CONFIG_GPIO_GECKO_COMMON_PRI Interrupt priority
CONFIG_GPIO_GECKO_PORTA Port A
CONFIG_GPIO_GECKO_PORTA_NAME Port A driver name
CONFIG_GPIO_GECKO_PORTB Port B
CONFIG_GPIO_GECKO_PORTB_NAME Port B driver name
CONFIG_GPIO_GECKO_PORTC Port C
CONFIG_GPIO_GECKO_PORTC_NAME Port C driver name
CONFIG_GPIO_GECKO_PORTD Port D
CONFIG_GPIO_GECKO_PORTD_NAME Port D driver name
CONFIG_GPIO_GECKO_PORTE Port E
CONFIG_GPIO_GECKO_PORTE_NAME Port E driver name
CONFIG_GPIO_GECKO_PORTF Port F
CONFIG_GPIO_GECKO_PORTF_NAME Port F driver name
CONFIG_GPIO_IMX IMX GPIO driver
CONFIG_GPIO_IMX_PORT_1 Port 1
CONFIG_GPIO_IMX_PORT_2 Port 2
CONFIG_GPIO_IMX_PORT_3 Port 3
CONFIG_GPIO_IMX_PORT_4 Port 4
CONFIG_GPIO_IMX_PORT_5 Port 5
CONFIG_GPIO_IMX_PORT_6 Port 6
CONFIG_GPIO_IMX_PORT_7 Port 7
CONFIG_GPIO_MCUX MCUX GPIO driver
CONFIG_GPIO_MCUX_IGPIO MCUX IGPIO driver
CONFIG_GPIO_MCUX_IGPIO_1 Port 1
CONFIG_GPIO_MCUX_IGPIO_2 Port 2
CONFIG_GPIO_MCUX_IGPIO_3 Port 3
CONFIG_GPIO_MCUX_IGPIO_4 Port 4
CONFIG_GPIO_MCUX_IGPIO_5 Port 5
CONFIG_GPIO_MCUX_LPC MCUX LPC GPIO driver
CONFIG_GPIO_MCUX_LPC_PORT0 Port 0
CONFIG_GPIO_MCUX_LPC_PORT0_NAME Port 0 driver name
CONFIG_GPIO_MCUX_LPC_PORT1 Port 1
CONFIG_GPIO_MCUX_LPC_PORT1_NAME Port 1 driver name
CONFIG_GPIO_MCUX_PORTA Port A
CONFIG_GPIO_MCUX_PORTB Port B
CONFIG_GPIO_MCUX_PORTC Port C
CONFIG_GPIO_MCUX_PORTD Port D
CONFIG_GPIO_MCUX_PORTE Port E
CONFIG_GPIO_MMIO32  
CONFIG_GPIO_NRF5 Nordic Semiconductor nRF5x-based GPIO driver
CONFIG_GPIO_NRF5_GPIOTE_CHAN_BASE  
CONFIG_GPIO_NRF5_INIT_PRIORITY nRF5 GPIO initialization priority
CONFIG_GPIO_NRF5_P0 nRF5x GPIO Port P0
CONFIG_GPIO_NRF5_P0_DEV_NAME GPIO Port P0 Device Name
CONFIG_GPIO_NRF5_P1 nRF5x GPIO Port P1
CONFIG_GPIO_NRF5_P1_DEV_NAME GPIO Port P1 Device Name
CONFIG_GPIO_PCAL9535A PCAL9535A I2C-based GPIO chip
CONFIG_GPIO_PCAL9535A_0 PCAL9535A GPIO chip #0
CONFIG_GPIO_PCAL9535A_0_DEV_NAME PCAL9535A GPIO chip #0 Device Name
CONFIG_GPIO_PCAL9535A_0_I2C_ADDR PCAL9535A GPIO chip #0 I2C slave address
CONFIG_GPIO_PCAL9535A_0_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #0 is connected
CONFIG_GPIO_PCAL9535A_1 PCAL9535A GPIO chip #1
CONFIG_GPIO_PCAL9535A_1_DEV_NAME PCAL9535A GPIO chip #1 Device Name
CONFIG_GPIO_PCAL9535A_1_I2C_ADDR PCAL9535A GPIO chip #1 I2C slave address
CONFIG_GPIO_PCAL9535A_1_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #1 is connected
CONFIG_GPIO_PCAL9535A_2 PCAL9535A GPIO chip #2
CONFIG_GPIO_PCAL9535A_2_DEV_NAME PCAL9535A GPIO chip #2 Device Name
CONFIG_GPIO_PCAL9535A_2_I2C_ADDR PCAL9535A GPIO chip #2 I2C slave address
CONFIG_GPIO_PCAL9535A_2_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #2 is connected
CONFIG_GPIO_PCAL9535A_3 PCAL9535A GPIO chip #3
CONFIG_GPIO_PCAL9535A_3_DEV_NAME PCAL9535A GPIO chip #3 Device Name
CONFIG_GPIO_PCAL9535A_3_I2C_ADDR PCAL9535A GPIO chip #3 I2C slave address
CONFIG_GPIO_PCAL9535A_3_I2C_MASTER_DEV_NAME I2C Master where PCAL9535A GPIO chip #3 is connected
CONFIG_GPIO_PCAL9535A_INIT_PRIORITY Init priority
CONFIG_GPIO_PULPINO Pulpino GPIO controller driver
CONFIG_GPIO_QMSI QMSI GPIO driver
CONFIG_GPIO_QMSI_0 QMSI GPIO block 0
CONFIG_GPIO_QMSI_0_IRQ_PRI  
CONFIG_GPIO_QMSI_1 QMSI GPIO block 1
CONFIG_GPIO_QMSI_API_REENTRANCY GPIO driver API reentrancy
CONFIG_GPIO_QMSI_INIT_PRIORITY Init priority
CONFIG_GPIO_QMSI_SS QMSI GPIO SS driver
CONFIG_GPIO_QMSI_SS_0 QMSI GPIO SS block 0
CONFIG_GPIO_QMSI_SS_1 QMSI GPIO SS block 1
CONFIG_GPIO_SAM Atmel SAM GPIO (PORT) driver
CONFIG_GPIO_SAM0 Atmel SAM0 GPIO (PORT) driver
CONFIG_GPIO_SCH Intel SCH GPIO controller
CONFIG_GPIO_SCH_0 Enable SCH GPIO port 0
CONFIG_GPIO_SCH_0_DEV_NAME Name of the device
CONFIG_GPIO_SCH_1 Enable SCH GPIO port 1
CONFIG_GPIO_SCH_1_DEV_NAME Name of the device
CONFIG_GPIO_SCH_INIT_PRIORITY Init priority
CONFIG_GPIO_STM32 GPIO Driver for STM32 family of MCUs
CONFIG_GPIO_STM32_PORTA Enable GPIO port A support
CONFIG_GPIO_STM32_PORTB Enable GPIO port B support
CONFIG_GPIO_STM32_PORTC Enable GPIO port C support
CONFIG_GPIO_STM32_PORTD Enable GPIO port D support
CONFIG_GPIO_STM32_PORTE Enable GPIO port E support
CONFIG_GPIO_STM32_PORTF Enable GPIO port F support
CONFIG_GPIO_STM32_PORTG Enable GPIO port G support
CONFIG_GPIO_STM32_PORTH Enable GPIO port H support
CONFIG_GPIO_STM32_PORTI Enable GPIO port I support
CONFIG_GPIO_STM32_PORTJ Enable GPIO port J support
CONFIG_GPIO_STM32_PORTK Enable GPIO port K support
CONFIG_GPIO_SX1509B SX1509B I2C GPIO chip
CONFIG_GPIO_SX1509B_DEV_NAME SX1509B GPIO chip Device Name
CONFIG_GPIO_SX1509B_I2C_ADDR SX1509B GPIO chip I2C slave address
CONFIG_GPIO_SX1509B_I2C_MASTER_DEV_NAME I2C Master to which SX1509B GPIO chip is connected
CONFIG_GPIO_SX1509B_INIT_PRIORITY Init priority
CONFIG_GP_ALL_DATA All data global pointer references
CONFIG_GP_GLOBAL Global data global pointer references
CONFIG_GP_LOCAL Local data global pointer references
CONFIG_GP_NONE No global pointer
CONFIG_GROVE Grove Device Drivers
CONFIG_GROVE_LCD_RGB Enable the Seeed Grove LCD RGB Backlight
CONFIG_GROVE_LCD_RGB_I2C_MASTER_DEV_NAME I2C Master where Grove LCD is connected
CONFIG_GROVE_LIGHT_SENSOR Enable the Seeed Grove Light Sensor
CONFIG_GROVE_LIGHT_SENSOR_ADC_CHANNEL ADC channel used by Grove Light Sensor
CONFIG_GROVE_LIGHT_SENSOR_ADC_DEV_NAME ADC where Grove Light Sensor is connected
CONFIG_GROVE_LIGHT_SENSOR_NAME Driver name
CONFIG_GROVE_TEMPERATURE_SENSOR Enable the Seeed Grove Temperature Sensor
CONFIG_GROVE_TEMPERATURE_SENSOR_ADC_CHANNEL ADC channel used by Grove Temperature Sensor
CONFIG_GROVE_TEMPERATURE_SENSOR_ADC_DEV_NAME ADC where Grove Temperature Sensor is connected
CONFIG_GROVE_TEMPERATURE_SENSOR_NAME Driver name
CONFIG_GROVE_TEMPERATURE_SENSOR_V1_0 v1.0
CONFIG_GROVE_TEMPERATURE_SENSOR_V1_X v1.1/v1.2
CONFIG_HARVARD Harvard Architecture
CONFIG_HAS_ALTERA_HAL Altera HAL drivers support
CONFIG_HAS_ARDUINO_I2C  
CONFIG_HAS_ARDUINO_SERIAL  
CONFIG_HAS_ARDUINO_SPI  
CONFIG_HAS_CC3220SDK  
CONFIG_HAS_CMSIS  
CONFIG_HAS_CMU  
CONFIG_HAS_DIV_INSTRUCTION  
CONFIG_HAS_DTS  
CONFIG_HAS_DTS_ADC  
CONFIG_HAS_DTS_GPIO  
CONFIG_HAS_DTS_GPIO_DEVICE  
CONFIG_HAS_DTS_I2C  
CONFIG_HAS_DTS_I2C_DEVICE  
CONFIG_HAS_DTS_SPI  
CONFIG_HAS_DTS_SPI_DEVICE  
CONFIG_HAS_DTS_SPI_PINS  
CONFIG_HAS_DTS_USB  
CONFIG_HAS_DTS_WDT  
CONFIG_HAS_FLASH_LOAD_OFFSET  
CONFIG_HAS_HW_NRF_ACL  
CONFIG_HAS_HW_NRF_ADC  
CONFIG_HAS_HW_NRF_CC310  
CONFIG_HAS_HW_NRF_CCM  
CONFIG_HAS_HW_NRF_CLOCK  
CONFIG_HAS_HW_NRF_COMP  
CONFIG_HAS_HW_NRF_ECB  
CONFIG_HAS_HW_NRF_EGU0  
CONFIG_HAS_HW_NRF_EGU1  
CONFIG_HAS_HW_NRF_EGU2  
CONFIG_HAS_HW_NRF_EGU3  
CONFIG_HAS_HW_NRF_EGU4  
CONFIG_HAS_HW_NRF_EGU5  
CONFIG_HAS_HW_NRF_GPIO0  
CONFIG_HAS_HW_NRF_GPIO1  
CONFIG_HAS_HW_NRF_GPIOTE  
CONFIG_HAS_HW_NRF_I2S  
CONFIG_HAS_HW_NRF_LPCOMP  
CONFIG_HAS_HW_NRF_MWU  
CONFIG_HAS_HW_NRF_NFCT  
CONFIG_HAS_HW_NRF_PDM  
CONFIG_HAS_HW_NRF_POWER  
CONFIG_HAS_HW_NRF_PPI  
CONFIG_HAS_HW_NRF_PWM0  
CONFIG_HAS_HW_NRF_PWM1  
CONFIG_HAS_HW_NRF_PWM2  
CONFIG_HAS_HW_NRF_PWM3  
CONFIG_HAS_HW_NRF_QDEC  
CONFIG_HAS_HW_NRF_QSPI  
CONFIG_HAS_HW_NRF_RNG  
CONFIG_HAS_HW_NRF_RTC0  
CONFIG_HAS_HW_NRF_RTC1  
CONFIG_HAS_HW_NRF_RTC2  
CONFIG_HAS_HW_NRF_SAADC  
CONFIG_HAS_HW_NRF_SPI0  
CONFIG_HAS_HW_NRF_SPI1  
CONFIG_HAS_HW_NRF_SPI2  
CONFIG_HAS_HW_NRF_SPIM0  
CONFIG_HAS_HW_NRF_SPIM1  
CONFIG_HAS_HW_NRF_SPIM2  
CONFIG_HAS_HW_NRF_SPIM3  
CONFIG_HAS_HW_NRF_SPIS0  
CONFIG_HAS_HW_NRF_SPIS1  
CONFIG_HAS_HW_NRF_SPIS2  
CONFIG_HAS_HW_NRF_SWI0  
CONFIG_HAS_HW_NRF_SWI1  
CONFIG_HAS_HW_NRF_SWI2  
CONFIG_HAS_HW_NRF_SWI3  
CONFIG_HAS_HW_NRF_SWI4  
CONFIG_HAS_HW_NRF_SWI5  
CONFIG_HAS_HW_NRF_TEMP  
CONFIG_HAS_HW_NRF_TIMER0  
CONFIG_HAS_HW_NRF_TIMER1  
CONFIG_HAS_HW_NRF_TIMER2  
CONFIG_HAS_HW_NRF_TIMER3  
CONFIG_HAS_HW_NRF_TIMER4  
CONFIG_HAS_HW_NRF_TWI0  
CONFIG_HAS_HW_NRF_TWI1  
CONFIG_HAS_HW_NRF_TWIM0  
CONFIG_HAS_HW_NRF_TWIM1  
CONFIG_HAS_HW_NRF_TWIS0  
CONFIG_HAS_HW_NRF_TWIS1  
CONFIG_HAS_HW_NRF_UART0  
CONFIG_HAS_HW_NRF_UARTE0  
CONFIG_HAS_HW_NRF_UARTE1  
CONFIG_HAS_HW_NRF_USBD  
CONFIG_HAS_HW_NRF_WDT  
CONFIG_HAS_IMX_CCM  
CONFIG_HAS_IMX_GPIO  
CONFIG_HAS_IMX_HAL  
CONFIG_HAS_IMX_I2C  
CONFIG_HAS_IMX_RDC  
CONFIG_HAS_MCG  
CONFIG_HAS_MCUX  
CONFIG_HAS_MCUX_ADC16  
CONFIG_HAS_MCUX_CCM  
CONFIG_HAS_MCUX_FTM  
CONFIG_HAS_MCUX_IGPIO  
CONFIG_HAS_MCUX_LPSCI  
CONFIG_HAS_MCUX_LPUART  
CONFIG_HAS_MCUX_RNGA  
CONFIG_HAS_MCUX_RTC  
CONFIG_HAS_MCUX_SIM  
CONFIG_HAS_MCUX_TRNG  
CONFIG_HAS_MSP432P4XXSDK  
CONFIG_HAS_MULX_INSTRUCTION  
CONFIG_HAS_MUL_INSTRUCTION  
CONFIG_HAS_NORDIC_DRIVERS  
CONFIG_HAS_NRFX  
CONFIG_HAS_OSC  
CONFIG_HAS_QMSI  
CONFIG_HAS_SEGGER_RTT  
CONFIG_HAS_SILABS_GECKO  
CONFIG_HAS_STLIB  
CONFIG_HAS_STM32CUBE  
CONFIG_HAS_SYSMPU Enable MPU on NXP Kinetis
CONFIG_HAS_WDT_MULTISTAGE  
CONFIG_HAVE_CUSTOM_LINKER_SCRIPT Custom linker scripts provided
CONFIG_HDC1008 HDC1008 Temperature and Humidity Sensor
CONFIG_HDC1008_GPIO_DEV_NAME GPIO device
CONFIG_HDC1008_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_HDC1008_I2C_ADDR I2C Address for HDC1008
CONFIG_HDC1008_I2C_MASTER_DEV_NAME I2C master where HDC1008 is connected
CONFIG_HDC1008_NAME Driver name
CONFIG_HEAP_MEM_POOL_SIZE Heap memory pool size (in bytes)
CONFIG_HID_INTERRUPT_EP_MPS USB HID Device Interrupt Endpoint size
CONFIG_HMC5883L HMC5883L magnetometer
CONFIG_HMC5883L_FS Full-scale range
CONFIG_HMC5883L_GPIO_DEV_NAME GPIO device
CONFIG_HMC5883L_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_HMC5883L_I2C_MASTER_DEV_NAME I2C master where HMC5883L is connected
CONFIG_HMC5883L_NAME Driver name
CONFIG_HMC5883L_ODR Output data rate
CONFIG_HMC5883L_THREAD_PRIORITY Thread priority
CONFIG_HMC5883L_THREAD_STACK_SIZE Thread stack size
CONFIG_HMC5883L_TRIGGER  
CONFIG_HMC5883L_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_HMC5883L_TRIGGER_NONE No trigger
CONFIG_HMC5883L_TRIGGER_OWN_THREAD Use own thread
CONFIG_HP206C HopeRF HP206C precision barometer and altimeter sensor
CONFIG_HP206C_ALT_OFFSET Altitude offset (in cm)
CONFIG_HP206C_ALT_OFFSET_RUNTIME Altitude offset set at runtime
CONFIG_HP206C_DRV_NAME Driver’s name
CONFIG_HP206C_I2C_PORT_NAME I2C master controller port name
CONFIG_HP206C_OSR Oversampling rate
CONFIG_HP206C_OSR_RUNTIME Oversampling rate set at runtime
CONFIG_HPET_TIMER HPET timer
CONFIG_HPET_TIMER_BASE_ADDRESS HPET Base Address
CONFIG_HPET_TIMER_DEBUG Enable HPET debug output
CONFIG_HPET_TIMER_FALLING_EDGE Falling Edge
CONFIG_HPET_TIMER_IRQ HPET Timer IRQ
CONFIG_HPET_TIMER_IRQ_PRIORITY HPET Timer IRQ Priority
CONFIG_HPET_TIMER_LEGACY_EMULATION HPET timer legacy emulation mode
CONFIG_HPET_TIMER_LEVEL_HIGH Level High
CONFIG_HPET_TIMER_LEVEL_LOW Level Low
CONFIG_HPET_TIMER_RISING_EDGE Rising Edge
CONFIG_HTS221 HTS221 temperature and humidity sensor
CONFIG_HTS221_GPIO_DEV_NAME GPIO device
CONFIG_HTS221_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_HTS221_I2C_MASTER_DEV_NAME I2C master where HTS221 is connected
CONFIG_HTS221_NAME Driver name
CONFIG_HTS221_ODR Output data rate
CONFIG_HTS221_THREAD_PRIORITY Thread priority
CONFIG_HTS221_THREAD_STACK_SIZE Thread stack size
CONFIG_HTS221_TRIGGER  
CONFIG_HTS221_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_HTS221_TRIGGER_NONE No trigger
CONFIG_HTS221_TRIGGER_OWN_THREAD Use own thread
CONFIG_HTTP HTTP support
CONFIG_HTTPS HTTPS support
CONFIG_HTTP_CLIENT HTTP client support
CONFIG_HTTP_CLIENT_NETWORK_TIMEOUT Default network activity timeout in seconds
CONFIG_HTTP_HEADERS HTTP header field max number of items
CONFIG_HTTP_PARSER HTTP Parser support
CONFIG_HTTP_PARSER_STRICT HTTP strict parsing
CONFIG_HTTP_PARSER_URL HTTP Parser for URL support
CONFIG_HTTP_SERVER HTTP server support
CONFIG_HTTP_SERVER_CONNECTIONS Max number of concurrent HTTP server connections
CONFIG_HTTP_SERVER_NUM_URLS Max number of URLs that the HTTP server will handle
CONFIG_HW_STACK_PROTECTION Hardware Stack Protection
CONFIG_I2C I2C Drivers
CONFIG_I2C_0 Enable I2C Port 0
CONFIG_I2C_0_DEFAULT_CFG Port 0 default configuration
CONFIG_I2C_0_IRQ_PRI Port 0 interrupt priority
CONFIG_I2C_0_NAME Port 0 device name
CONFIG_I2C_0_NRF_TWI nRF TWI 0
CONFIG_I2C_0_NRF_TWIM nRF TWIM 0
CONFIG_I2C_1 Enable I2C Port 1
CONFIG_I2C_1_DEFAULT_CFG Port 1 default configuration
CONFIG_I2C_1_IRQ_PRI Port 1 interrupt priority
CONFIG_I2C_1_NAME Port 1 device name
CONFIG_I2C_1_NRF_TWI nRF TWI 1
CONFIG_I2C_1_NRF_TWIM nRF TWIM 1
CONFIG_I2C_2 Enable I2C Port 2
CONFIG_I2C_2_DEFAULT_CFG Port 2 default configuration
CONFIG_I2C_2_IRQ_PRI Port 2 interrupt priority
CONFIG_I2C_2_NAME Port 2 device name
CONFIG_I2C_3 Enable I2C Port 3
CONFIG_I2C_3_DEFAULT_CFG Port 3 default configuration
CONFIG_I2C_3_IRQ_PRI Port 3 interrupt priority
CONFIG_I2C_3_NAME Port 3 device name
CONFIG_I2C_4 Enable I2C Port 4
CONFIG_I2C_4_DEFAULT_CFG Port 4 default configuration
CONFIG_I2C_4_IRQ_PRI Port 4 interrupt priority
CONFIG_I2C_4_NAME Port 4 device name
CONFIG_I2C_5 Enable I2C Port 5
CONFIG_I2C_5_DEFAULT_CFG Port 5 default configuration
CONFIG_I2C_5_IRQ_PRI Port 5 interrupt priority
CONFIG_I2C_5_NAME Port 5 device name
CONFIG_I2C_6 Enable I2C Port 6
CONFIG_I2C_6_DEFAULT_CFG Port 6 default configuration
CONFIG_I2C_6_IRQ_PRI Port 6 interrupt priority
CONFIG_I2C_6_NAME Port 6 device name
CONFIG_I2C_7 Enable I2C Port 7
CONFIG_I2C_7_DEFAULT_CFG Port 7 default configuration
CONFIG_I2C_7_IRQ_PRI Port 7 interrupt priority
CONFIG_I2C_7_NAME Port 7 device name
CONFIG_I2C_ATMEL_SAM3 [deprecated] Atmel SAM3X I2C Driver
CONFIG_I2C_BITBANG  
CONFIG_I2C_CC32XX CC32XX I2C driver
CONFIG_I2C_DW Design Ware I2C support
CONFIG_I2C_DW_0_IRQ_DIRECT Direct Hardware Interrupt
CONFIG_I2C_DW_0_IRQ_SHARED Shared IRQ
CONFIG_I2C_DW_0_IRQ_SHARED_NAME Device name for Shared IRQ
CONFIG_I2C_DW_CLOCK_SPEED Set the clock speed for I2C
CONFIG_I2C_DW_SHARED_IRQ  
CONFIG_I2C_EEPROM_SLAVE I2C Slave EEPROM driver
CONFIG_I2C_EEPROM_SLAVE_0 Enable I2C Slave EEPROM driver instance 0
CONFIG_I2C_EEPROM_SLAVE_0_ADDRESS I2C Slave EEPROM 0 address
CONFIG_I2C_EEPROM_SLAVE_0_CONTROLLER_DEV_NAME I2C Slave EEPROM 0 Controller device name
CONFIG_I2C_EEPROM_SLAVE_0_NAME I2C Slave EEPROM 0 device name
CONFIG_I2C_EEPROM_SLAVE_0_SIZE I2C Slave EEPROM 0 Size in KiB
CONFIG_I2C_EEPROM_SLAVE_1 Enable I2C Slave EEPROM driver instance 1
CONFIG_I2C_EEPROM_SLAVE_1_ADDRESS I2C Slave EEPROM 1 address
CONFIG_I2C_EEPROM_SLAVE_1_CONTROLLER_DEV_NAME I2C Slave EEPROM 1 Controller device name
CONFIG_I2C_EEPROM_SLAVE_1_NAME I2C Slave EEPROM 1 device name
CONFIG_I2C_EEPROM_SLAVE_1_SIZE I2C Slave EEPROM 1 Size in KiB
CONFIG_I2C_ESP32 ESP32 I2C
CONFIG_I2C_ESP32_0_IRQ Port 0 IRQ line
CONFIG_I2C_ESP32_0_RX_LSB_FIRST Port 0 Receive LSB first
CONFIG_I2C_ESP32_0_SCL_PIN Port 0 SCL pin
CONFIG_I2C_ESP32_0_SDA_PIN Port 0 SDA pin
CONFIG_I2C_ESP32_0_TX_LSB_FIRST Port 0 Transmit LSB first
CONFIG_I2C_ESP32_1_IRQ Port 1 IRQ line
CONFIG_I2C_ESP32_1_RX_LSB_FIRST Port 1 Receive LSB first
CONFIG_I2C_ESP32_1_SCL_PIN Port 1 SCL pin
CONFIG_I2C_ESP32_1_SDA_PIN Port 1 SDA pin
CONFIG_I2C_ESP32_1_TX_LSB_FIRST Port 1 Transmit LSB first
CONFIG_I2C_ESP32_TIMEOUT I2C timeout to receive a data bit in APB clock cycles
CONFIG_I2C_GPIO GPIO bit banging I2C support
CONFIG_I2C_GPIO_0 Enable GPIO Bit Bang I2C device 0
CONFIG_I2C_GPIO_0_GPIO Bit Bang I2C device 0 GPIO name
CONFIG_I2C_GPIO_0_NAME GPIO Bit Bang I2C device 0 device name
CONFIG_I2C_GPIO_0_SCL_PIN Bit Bang I2C device 0 GPIO pin number for SCL
CONFIG_I2C_GPIO_0_SDA_PIN Bit Bang I2C device 0 GPIO pin number for SDA
CONFIG_I2C_GPIO_1 Enable GPIO Bit Bang I2C device 1
CONFIG_I2C_GPIO_1_GPIO Bit Bang I2C device 1 GPIO name
CONFIG_I2C_GPIO_1_NAME Bit Bang I2C device 1 device name
CONFIG_I2C_GPIO_1_SCL_PIN Bit Bang I2C device 1 GPIO pin number for SCL
CONFIG_I2C_GPIO_1_SDA_PIN Bit Bang I2C device 1 GPIO pin number for SDA
CONFIG_I2C_GPIO_2 Enable GPIO Bit Bang I2C device 2
CONFIG_I2C_GPIO_2_GPIO Bit Bang I2C device 2 GPIO name
CONFIG_I2C_GPIO_2_NAME Bit Bang I2C device 2 device name
CONFIG_I2C_GPIO_2_SCL_PIN Bit Bang I2C device 2 GPIO pin number for SCL
CONFIG_I2C_GPIO_2_SDA_PIN Bit Bang I2C device 2 GPIO pin number for SDA
CONFIG_I2C_GPIO_3 Enable GPIO Bit Bang I2C device 3
CONFIG_I2C_GPIO_3_GPIO Bit Bang I2C device 3 GPIO name
CONFIG_I2C_GPIO_3_NAME Bit Bang I2C device 3 device name
CONFIG_I2C_GPIO_3_SCL_PIN Bit Bang I2C device 3 GPIO pin number for SCL
CONFIG_I2C_GPIO_3_SDA_PIN Bit Bang I2C device 3 GPIO pin number for SDA
CONFIG_I2C_IMX i.MX I2C driver
CONFIG_I2C_INIT_PRIORITY Init priority
CONFIG_I2C_MCUX MCUX I2C driver
CONFIG_I2C_NIOS2 Nios-II I2C driver
CONFIG_I2C_NRFX nRF TWI nrfx drivers
CONFIG_I2C_QMSI QMSI I2C driver
CONFIG_I2C_QMSI_SS QMSI I2C driver for the Sensor Subsystem
CONFIG_I2C_SAM_TWI Atmel SAM (TWI) I2C driver
CONFIG_I2C_SAM_TWIHS Atmel SAM (TWIHS) I2C driver
CONFIG_I2C_SBCON I2C driver for ARM’s SBCon two-wire serial bus interface
CONFIG_I2C_SBCON_0 Enable SBCon device 0
CONFIG_I2C_SBCON_0_NAME SBCon device 0 Device Name
CONFIG_I2C_SBCON_1 Enable SBCon device 1
CONFIG_I2C_SBCON_1_NAME SBCon device 1 Device Name
CONFIG_I2C_SBCON_2 Enable SBCon device 2
CONFIG_I2C_SBCON_2_NAME SBCon device 2 Device Name
CONFIG_I2C_SBCON_3 Enable SBCon device 3
CONFIG_I2C_SBCON_3_NAME SBCon device 0 Device Name
CONFIG_I2C_SDA_RX_HOLD  
CONFIG_I2C_SDA_SETUP  
CONFIG_I2C_SDA_TX_HOLD  
CONFIG_I2C_SLAVE I2C Slave Drivers
CONFIG_I2C_SLAVE_INIT_PRIORITY Init priority
CONFIG_I2C_SS_0 Enable I2C_SS_0
CONFIG_I2C_SS_1 Enable I2C SS Port 1
CONFIG_I2C_SS_SDA_HOLD  
CONFIG_I2C_SS_SDA_SETUP  
CONFIG_I2C_STM32 STM32 I2C driver
CONFIG_I2C_STM32_COMBINED_INTERRUPT  
CONFIG_I2C_STM32_INTERRUPT STM32 MCU I2C Interrupt Support
CONFIG_I2C_STM32_V1 STM32 V1 Driver (F1/F4X)
CONFIG_I2C_STM32_V2 STM32 V2 Driver (F0/F3/F7/L0/L4X)
CONFIG_I2S I2S bus drivers
CONFIG_I2S_CAVS Intel I2S (SSP) Bus Driver
CONFIG_I2S_CAVS_0_DMA_TX_CHANNEL DMA TX channel
CONFIG_I2S_CAVS_0_IRQ_PRI Interrupt priority
CONFIG_I2S_CAVS_0_NAME I2S 0 device name
CONFIG_I2S_CAVS_1_DMA_TX_CHANNEL DMA TX channel
CONFIG_I2S_CAVS_1_IRQ_PRI Interrupt priority
CONFIG_I2S_CAVS_1_NAME I2S 1 device name
CONFIG_I2S_CAVS_DMA_NAME DMA device name
CONFIG_I2S_CAVS_TX_BLOCK_COUNT TX queue length
CONFIG_I2S_INIT_PRIORITY Init priority
CONFIG_I2S_SAM_SSC Atmel SAM MCU family I2S (SSC) Bus Driver
CONFIG_I2S_SAM_SSC_0_DMA_RX_CHANNEL DMA RX channel
CONFIG_I2S_SAM_SSC_0_DMA_TX_CHANNEL DMA TX channel
CONFIG_I2S_SAM_SSC_0_IRQ_PRI Interrupt priority
CONFIG_I2S_SAM_SSC_0_NAME I2S 0 device name
CONFIG_I2S_SAM_SSC_0_PIN_RF_EN RF pin enabled
CONFIG_I2S_SAM_SSC_0_PIN_RK_EN RK pin enabled
CONFIG_I2S_SAM_SSC_0_PIN_TD_PB5 PB5
CONFIG_I2S_SAM_SSC_0_PIN_TD_PD10 PD10
CONFIG_I2S_SAM_SSC_0_PIN_TD_PD26 PD26
CONFIG_I2S_SAM_SSC_DMA_NAME DMA device name
CONFIG_I2S_SAM_SSC_RX_BLOCK_COUNT RX queue length
CONFIG_I2S_SAM_SSC_TX_BLOCK_COUNT TX queue length
CONFIG_IA32_LEGACY_IO_PORTS Support IA32 legacy IO ports
CONFIG_IDLE_STACK_SIZE Size of stack for idle thread
CONFIG_IDT_NUM_VECTORS Number of IDT vectors
CONFIG_IEEE802154 IEEE 802.15.4 drivers options
CONFIG_IEEE802154_CC1200 TI CC1200 Driver support
CONFIG_IEEE802154_CC1200_CCA_THRESHOLD Value in dbm of the CCA threshold
CONFIG_IEEE802154_CC1200_DRV_NAME TI CC1200 Driver’s name
CONFIG_IEEE802154_CC1200_GPIO_0_NAME  
CONFIG_IEEE802154_CC1200_GPIO_1_NAME  
CONFIG_IEEE802154_CC1200_GPIO_SPI_CS Manage SPI CS through a GPIO pin
CONFIG_IEEE802154_CC1200_GPIO_SPI_CS_DRV_NAME GPIO driver’s name to use to drive SPI CS through
CONFIG_IEEE802154_CC1200_GPIO_SPI_CS_PIN GPIO PIN to use to drive SPI CS through
CONFIG_IEEE802154_CC1200_INIT_PRIO CC1200 initialization priority
CONFIG_IEEE802154_CC1200_MAC4 MAC Address Byte 4
CONFIG_IEEE802154_CC1200_MAC5 MAC Address Byte 5
CONFIG_IEEE802154_CC1200_MAC6 MAC Address Byte 6
CONFIG_IEEE802154_CC1200_MAC7 MAC Address Byte 7
CONFIG_IEEE802154_CC1200_PKTCFG0  
CONFIG_IEEE802154_CC1200_PKTCFG1  
CONFIG_IEEE802154_CC1200_PKTCFG2  
CONFIG_IEEE802154_CC1200_RANDOM_MAC Random MAC address
CONFIG_IEEE802154_CC1200_RFEND_CFG0  
CONFIG_IEEE802154_CC1200_RFEND_CFG1  
CONFIG_IEEE802154_CC1200_RF_PRESET Use TI CC1200 RF pre-sets
CONFIG_IEEE802154_CC1200_RF_SET_0 868MHz - 50Kbps - 2-GFSK - IEEE 802.15.4g compliant - ETSI
CONFIG_IEEE802154_CC1200_RF_SET_1 920MHz - 50Kbps - 2-GFSK - IEEE 802.15.4g compliant - ARIB
CONFIG_IEEE802154_CC1200_RF_SET_2 434MHz - 50Kbps - 2-GFSK - IEEE 802.15.4g compliant - ETSI
CONFIG_IEEE802154_CC1200_RSSI_OFFSET Value in dbm of the RSSI offset
CONFIG_IEEE802154_CC1200_RX_STACK_SIZE Driver’s internal RX thread stack size
CONFIG_IEEE802154_CC1200_SETTLING_CFG  
CONFIG_IEEE802154_CC1200_SPI_DRV_NAME SPI driver’s name to use to access CC1200
CONFIG_IEEE802154_CC1200_SPI_FREQ SPI system frequency
CONFIG_IEEE802154_CC1200_SPI_SLAVE SPI slave linked to CC1200
CONFIG_IEEE802154_CC1200_XOSC Value of the Crystal oscillator in kHz
CONFIG_IEEE802154_CC2520 TI CC2520 Driver support
CONFIG_IEEE802154_CC2520_CRYPTO Enable hardware crypto helper on cc2520
CONFIG_IEEE802154_CC2520_CRYPTO_DRV_NAME TI CC2520 Crypto Driver’s name
CONFIG_IEEE802154_CC2520_CRYPTO_INIT_PRIO TI CC2520 crypto device initialization priority
CONFIG_IEEE802154_CC2520_DRV_NAME TI CC2520 Driver’s name
CONFIG_IEEE802154_CC2520_GPIO_0_NAME  
CONFIG_IEEE802154_CC2520_GPIO_1_NAME  
CONFIG_IEEE802154_CC2520_GPIO_SPI_CS Manage SPI CS through a GPIO pin
CONFIG_IEEE802154_CC2520_GPIO_SPI_CS_DRV_NAME GPIO driver’s name to use to drive SPI CS through
CONFIG_IEEE802154_CC2520_GPIO_SPI_CS_PIN GPIO PIN to use to drive SPI CS through
CONFIG_IEEE802154_CC2520_INIT_PRIO CC2520 initialization priority
CONFIG_IEEE802154_CC2520_MAC4 MAC Address Byte 4
CONFIG_IEEE802154_CC2520_MAC5 MAC Address Byte 5
CONFIG_IEEE802154_CC2520_MAC6 MAC Address Byte 6
CONFIG_IEEE802154_CC2520_MAC7 MAC Address Byte 7
CONFIG_IEEE802154_CC2520_RANDOM_MAC Random MAC address
CONFIG_IEEE802154_CC2520_RX_STACK_SIZE Driver’s internal RX thread stack size
CONFIG_IEEE802154_CC2520_SPI_DRV_NAME SPI driver’s name to use to access CC2520
CONFIG_IEEE802154_CC2520_SPI_FREQ SPI system frequency
CONFIG_IEEE802154_CC2520_SPI_SLAVE SPI slave linked to CC2520
CONFIG_IEEE802154_KW41Z NXP KW41Z Driver support
CONFIG_IEEE802154_KW41Z_DRV_NAME NXP KW41Z Driver’s name
CONFIG_IEEE802154_KW41Z_INIT_PRIO KW41Z initialization priority
CONFIG_IEEE802154_MCR20A NXP MCR20A Driver support
CONFIG_IEEE802154_MCR20A_DRV_NAME NXP MCR20A Driver’s name
CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS Manage SPI CS through a GPIO pin
CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME GPIO driver’s name to use to drive SPI CS through
CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN GPIO PIN to use to drive SPI CS through
CONFIG_IEEE802154_MCR20A_INIT_PRIO MCR20A initialization priority
CONFIG_IEEE802154_MCR20A_RX_STACK_SIZE Driver’s internal RX thread stack size
CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME SPI driver’s name to use to access MCR20A
CONFIG_IEEE802154_MCR20A_SPI_FREQ SPI system frequency
CONFIG_IEEE802154_MCR20A_SPI_SLAVE SPI slave linked to MCR20A
CONFIG_IEEE802154_NRF5 nRF52 series IEEE 802.15.4 Driver
CONFIG_IEEE802154_NRF5_CCA_CORR_LIMIT nRF52 IEEE 802.15.4 CCA Correlator limit
CONFIG_IEEE802154_NRF5_CCA_CORR_THRESHOLD nRF52 IEEE 802.15.4 CCA Correlator threshold
CONFIG_IEEE802154_NRF5_CCA_ED_THRESHOLD nRF52 IEEE 802.15.4 CCA Energy Detection threshold
CONFIG_IEEE802154_NRF5_CCA_MODE_CARRIER Carrier Seen
CONFIG_IEEE802154_NRF5_CCA_MODE_CARRIER_AND_ED Energy Above Threshold AND Carrier Seen
CONFIG_IEEE802154_NRF5_CCA_MODE_CARRIER_OR_ED Energy Above Threshold OR Carrier Seen
CONFIG_IEEE802154_NRF5_CCA_MODE_ED Energy Above Threshold
CONFIG_IEEE802154_NRF5_DRV_NAME nRF52 IEEE 802.15.4 Driver’s name
CONFIG_IEEE802154_NRF5_INIT_PRIO nRF52 IEEE 802.15.4 initialization priority
CONFIG_IEEE802154_NRF5_RX_STACK_SIZE Driver’s internal RX thread stack size
CONFIG_IEEE802154_RAW_MODE Use IEEE 802.15.4 driver without the MAC stack
CONFIG_IEEE802154_UPIPE UART PIPE fake radio driver support for QEMU
CONFIG_IEEE802154_UPIPE_DRV_NAME UART PIPE Driver name
CONFIG_IEEE802154_UPIPE_HW_FILTER Hw Filtering
CONFIG_IEEE802154_UPIPE_MAC4 MAC Address Byte 4
CONFIG_IEEE802154_UPIPE_MAC5 MAC Address Byte 5
CONFIG_IEEE802154_UPIPE_MAC6 MAC Address Byte 6
CONFIG_IEEE802154_UPIPE_MAC7 MAC Address Byte 7
CONFIG_IEEE802154_UPIPE_RANDOM_MAC Random MAC address
CONFIG_ILI9340 ILI9340 display driver
CONFIG_ILI9340_CMD_DATA_GPIO_PORT_NAME Command/Data GPIO controller port name
CONFIG_ILI9340_CMD_DATA_PIN ILI9340 command/data pin
CONFIG_ILI9340_CS_GPIO_PIN ILI9340 GPIO chip select
CONFIG_ILI9340_CS_GPIO_PORT_NAME Chip select GPIO controller port name
CONFIG_ILI9340_DEV_NAME ILI9340 device name
CONFIG_ILI9340_GPIO_CS Use GPIO pin for chip select
CONFIG_ILI9340_LCD_ADAFRUIT_1480 Adafruit 2.2” TFT 1480
CONFIG_ILI9340_RESET_GPIO_PORT_NAME Reset GPIO controller port name
CONFIG_ILI9340_RESET_PIN ILI9340 Reset pin
CONFIG_ILI9340_SPI_DEV_NAME SPI master where ILI9340 is connected
CONFIG_ILI9340_SPI_FREQ SPI Frequency
CONFIG_ILI9340_SPI_SLAVE_NUMBER SPI Slave number where ILI9340 is connected
CONFIG_IMG_BLOCK_BUF_SIZE Image writer buffer size
CONFIG_IMG_MANAGER DFU image manager
CONFIG_IMG_MGMT_UL_CHUNK_SIZE Maximum chunk size for image uploads
CONFIG_INCLUDE_RESET_VECTOR Include Reset vector / Include Reset vector
CONFIG_INIT_ARM_PLL Initialize ARM PLL
CONFIG_INIT_STACKS Initialize stack areas
CONFIG_INIT_SYS_PLL Initialize SYS PLL
CONFIG_INIT_USB1_PLL Initialize USB1 PLL
CONFIG_INT_LATENCY_BENCHMARK Interrupt latency metrics [EXPERIMENTAL]
CONFIG_IOAPIC IO-APIC
CONFIG_IOAPIC_DEBUG IO-APIC Debugging
CONFIG_IOAPIC_MASK_RTE Mask out RTE entries on boot
CONFIG_IOAPIC_NUM_RTES Number of Redirection Table Entries available
CONFIG_IPG_DIV IPG clock divider
CONFIG_IPM IPM drivers
CONFIG_IPM_CONSOLE_INIT_PRIORITY IPM console init priority
CONFIG_IPM_CONSOLE_RECEIVER Inter-processor Mailbox console receiver
CONFIG_IPM_CONSOLE_SENDER Inter-processor Mailbox console sender
CONFIG_IPM_CONSOLE_STACK_SIZE Stack size for IPM console receiver thread
CONFIG_IPM_MCUX MCUX IPM driver
CONFIG_IPM_QUARK_SE Quark SE IPM driver
CONFIG_IPM_QUARK_SE_MASTER Quark SE IPM master controller
CONFIG_IRQ_OFFLOAD Enable IRQ offload
CONFIG_IRQ_OFFLOAD_INTNUM IRQ offload SW interrupt index
CONFIG_IRQ_OFFLOAD_VECTOR IDT vector to use for IRQ offload
CONFIG_ISA_IA32  
CONFIG_ISA_THUMB2  
CONFIG_ISL29035 ISL29035 light sensor
CONFIG_ISL29035_GPIO_DEV_NAME GPIO device
CONFIG_ISL29035_GPIO_PIN_NUM GPIO pin number
CONFIG_ISL29035_I2C_MASTER_DEV_NAME I2C Master
CONFIG_ISL29035_INTEGRATION_TIME_105K 105 ms
CONFIG_ISL29035_INTEGRATION_TIME_26 0.0256 ms
CONFIG_ISL29035_INTEGRATION_TIME_410 0.41 ms
CONFIG_ISL29035_INTEGRATION_TIME_6500 6.5 ms
CONFIG_ISL29035_INT_PERSIST_1 1
CONFIG_ISL29035_INT_PERSIST_16 16
CONFIG_ISL29035_INT_PERSIST_4 4
CONFIG_ISL29035_INT_PERSIST_8 8
CONFIG_ISL29035_LUX_RANGE_16K 16000
CONFIG_ISL29035_LUX_RANGE_1K 1000
CONFIG_ISL29035_LUX_RANGE_4K 4000
CONFIG_ISL29035_LUX_RANGE_64K 64000
CONFIG_ISL29035_MODE_ALS ambient light
CONFIG_ISL29035_MODE_IR infrared
CONFIG_ISL29035_NAME Driver name
CONFIG_ISL29035_THREAD_PRIORITY Thread priority / Thread priority
CONFIG_ISL29035_THREAD_STACK_SIZE Thread stack size
CONFIG_ISL29035_TRIGGER  
CONFIG_ISL29035_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_ISL29035_TRIGGER_NONE No trigger
CONFIG_ISL29035_TRIGGER_OWN_THREAD Use own thread
CONFIG_ISR_STACK_SIZE ISR and initialization stack size (in bytes)
CONFIG_IS_BOOTLOADER Act as a bootloader
CONFIG_ITCM_BASE_ADDRESS  
CONFIG_ITCM_SIZE  
CONFIG_IWDG_STM32 Independent Watchdog (IWDG) Driver for STM32 family of MCUs
CONFIG_IWDG_STM32_START_AT_BOOT Start IWDG during boot
CONFIG_IWDG_STM32_TIMEOUT Value for IWDG timeout in [us]
CONFIG_JAILHOUSE Zephyr port to boot as a (x86) Jailhouse inmate cell payload
CONFIG_JAILHOUSE_X2APIC When in Jailhouse inmate cell mode, access APIC in x2APIC mode
CONFIG_JSON_LIBRARY Build JSON library
CONFIG_K64_BUS_CLOCK_DIVIDER Freescale K64 bus clock divider
CONFIG_K64_CORE_CLOCK_DIVIDER Freescale K64 core clock divider
CONFIG_K64_FLASH_CLOCK_DIVIDER Freescale K64 flash clock divider
CONFIG_K64_FLEXBUS_CLOCK_DIVIDER Freescale K64 FlexBus clock divider
CONFIG_KERNEL_BIN_NAME The kernel binary name
CONFIG_KERNEL_DEBUG Kernel debugging
CONFIG_KERNEL_ENTRY Kernel entry symbol
CONFIG_KERNEL_EVENT_LOGGER Enable kernel event logger features
CONFIG_KERNEL_EVENT_LOGGER_BUFFER_SIZE Kernel event logger buffer size
CONFIG_KERNEL_EVENT_LOGGER_CONTEXT_SWITCH Context switch event logging point
CONFIG_KERNEL_EVENT_LOGGER_CUSTOM_TIMESTAMP Kernel event logger custom timestamp
CONFIG_KERNEL_EVENT_LOGGER_DYNAMIC Kernel event logger dynamic enabling
CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT Interrupt event logging point
CONFIG_KERNEL_EVENT_LOGGER_SLEEP Sleep event logging point
CONFIG_KERNEL_EVENT_LOGGER_THREAD Thread event logging point
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT Default init priority
CONFIG_KERNEL_INIT_PRIORITY_DEVICE Default init priority for device drivers
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS Kernel objects initialization priority
CONFIG_KERNEL_SHELL Enable kernel shell
CONFIG_KW2XD_BUS_CLOCK_DIVIDER KW2xD bus clock divider
CONFIG_KW2XD_CORE_CLOCK_DIVIDER KW2xD core clock divider
CONFIG_KW2XD_FLASH_CLOCK_DIVIDER KW2xD flash clock divider
CONFIG_KW41_DBG_TRACE Enabled simplified debug tracing of events
CONFIG_LDREX_STREX_AVAILABLE  
CONFIG_LED LED drivers
CONFIG_LED_INIT_PRIORITY LED initialization priority
CONFIG_LED_STRIP LED strip drivers
CONFIG_LED_STRIP_INIT_PRIORITY LED strip initialization priority
CONFIG_LED_STRIP_RGB_SCRATCH  
CONFIG_LIBMETAL libmetal Support
CONFIG_LIBMETAL_SRC_PATH libmetal library source path
CONFIG_LINK_WHOLE_ARCHIVE Allow linking with –whole-archive
CONFIG_LIS2DH LIS2DH Three Axis Accelerometer
CONFIG_LIS2DH_ACCEL_RANGE_16G +/-16g
CONFIG_LIS2DH_ACCEL_RANGE_2G +/-2g
CONFIG_LIS2DH_ACCEL_RANGE_4G +/-4g
CONFIG_LIS2DH_ACCEL_RANGE_8G +/-8g
CONFIG_LIS2DH_ACCEL_RANGE_RUNTIME Set at runtime
CONFIG_LIS2DH_BUS_I2C I2C bus
CONFIG_LIS2DH_BUS_SPI SPI bus
CONFIG_LIS2DH_GPIO_DEV_NAME GPIO device
CONFIG_LIS2DH_I2C_ADDR LIS2DH I2C address
CONFIG_LIS2DH_I2C_MASTER_DEV_NAME I2C master where LIS2DH is connected
CONFIG_LIS2DH_INT1_GPIO_PIN Interrupt 1 GPIO pin number
CONFIG_LIS2DH_INT2_GPIO_PIN Interrupt 2 GPIO pin number
CONFIG_LIS2DH_NAME Driver name
CONFIG_LIS2DH_ODR_1 1Hz
CONFIG_LIS2DH_ODR_2 10Hz
CONFIG_LIS2DH_ODR_3 25Hz
CONFIG_LIS2DH_ODR_4 50Hz
CONFIG_LIS2DH_ODR_5 100Hz
CONFIG_LIS2DH_ODR_6 200Hz
CONFIG_LIS2DH_ODR_7 400Hz
CONFIG_LIS2DH_ODR_8 1.6KHz
CONFIG_LIS2DH_ODR_9_LOW 5KHz
CONFIG_LIS2DH_ODR_9_NORMAL 1.25KHz
CONFIG_LIS2DH_ODR_RUNTIME Set at runtime
CONFIG_LIS2DH_POWER_MODE_LOW low
CONFIG_LIS2DH_POWER_MODE_NORMAL normal
CONFIG_LIS2DH_SPI_FREQUENCY SPI clock frequency
CONFIG_LIS2DH_SPI_MASTER_DEV_NAME SPI master device name
CONFIG_LIS2DH_SPI_SS_1 LIS2DH SPI slave 1 select number
CONFIG_LIS2DH_THREAD_PRIORITY Thread priority
CONFIG_LIS2DH_THREAD_STACK_SIZE Thread stack size
CONFIG_LIS2DH_TRIGGER  
CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_LIS2DH_TRIGGER_NONE No trigger
CONFIG_LIS2DH_TRIGGER_OWN_THREAD Use own thread
CONFIG_LIS3DH LIS3DH Three Axis Accelerometer
CONFIG_LIS3DH_ACCEL_RANGE_16G +/-16g
CONFIG_LIS3DH_ACCEL_RANGE_2G +/-2g
CONFIG_LIS3DH_ACCEL_RANGE_4G +/-4g
CONFIG_LIS3DH_ACCEL_RANGE_8G +/-8g
CONFIG_LIS3DH_GPIO_DEV_NAME GPIO device
CONFIG_LIS3DH_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_LIS3DH_I2C_ADDR LIS3DH I2C address
CONFIG_LIS3DH_I2C_MASTER_DEV_NAME I2C master where LIS3DH is connected
CONFIG_LIS3DH_NAME Driver name
CONFIG_LIS3DH_ODR_1 1Hz
CONFIG_LIS3DH_ODR_2 10Hz
CONFIG_LIS3DH_ODR_3 25Hz
CONFIG_LIS3DH_ODR_4 50Hz
CONFIG_LIS3DH_ODR_5 100Hz
CONFIG_LIS3DH_ODR_6 200Hz
CONFIG_LIS3DH_ODR_7 400Hz
CONFIG_LIS3DH_ODR_8 1.6KHz
CONFIG_LIS3DH_ODR_9_LOW 5KHz
CONFIG_LIS3DH_ODR_9_NORMAL 1.25KHz
CONFIG_LIS3DH_POWER_MODE_LOW low
CONFIG_LIS3DH_POWER_MODE_NORMAL normal
CONFIG_LIS3DH_THREAD_PRIORITY Thread priority
CONFIG_LIS3DH_THREAD_STACK_SIZE Thread stack size
CONFIG_LIS3DH_TRIGGER  
CONFIG_LIS3DH_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_LIS3DH_TRIGGER_NONE No trigger
CONFIG_LIS3DH_TRIGGER_OWN_THREAD Use own thread
CONFIG_LIS3MDL LIS3MDL magnetometer
CONFIG_LIS3MDL_FS Full-scale range
CONFIG_LIS3MDL_GPIO_DEV_NAME GPIO device
CONFIG_LIS3MDL_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_LIS3MDL_I2C_ADDR I2C address
CONFIG_LIS3MDL_I2C_MASTER_DEV_NAME I2C master where LIS3MDL is connected
CONFIG_LIS3MDL_NAME Driver name
CONFIG_LIS3MDL_ODR Output data rate
CONFIG_LIS3MDL_THREAD_PRIORITY Thread priority
CONFIG_LIS3MDL_THREAD_STACK_SIZE Thread stack size
CONFIG_LIS3MDL_TRIGGER  
CONFIG_LIS3MDL_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_LIS3MDL_TRIGGER_NONE No trigger
CONFIG_LIS3MDL_TRIGGER_OWN_THREAD Use own thread
CONFIG_LLMNR_RESOLVER Enable LLMNR support
CONFIG_LLMNR_RESOLVER_ADDITIONAL_BUF_CTR Additional DNS buffers
CONFIG_LLMNR_RESPONDER LLMNR responder
CONFIG_LLMNR_RESPONDER_INIT_PRIO Startup priority for the LLMNR responder init
CONFIG_LLMNR_RESPONDER_TTL Time-to-Live of returned DNS name
CONFIG_LOAPIC LOAPIC
CONFIG_LOAPIC_BASE_ADDRESS Local APIC Base Address
CONFIG_LOAPIC_SPURIOUS_VECTOR Handle LOAPIC spurious interrupts
CONFIG_LOAPIC_SPURIOUS_VECTOR_ID LOAPIC spurious vector ID
CONFIG_LOAPIC_TIMER LOAPIC timer
CONFIG_LOAPIC_TIMER_IRQ Local APIC Timer IRQ
CONFIG_LOAPIC_TIMER_IRQ_PRIORITY Local APIC Timer IRQ Priority
CONFIG_LOG Enable Logger
CONFIG_LOG_BACKEND_UART Enable UART backend
CONFIG_LOG_BACKEND_UART_FORMAT_TIMESTAMP Enable timestamp formatting in the UART backend
CONFIG_LOG_BACKEND_UART_SHOW_COLOR Enable colors in the UART backend
CONFIG_LOG_BUFFER_SIZE Number of bytes dedicated for the logger internal buffer.
CONFIG_LOG_DEFAULT_LEVEL Default log level
CONFIG_LOG_DOMAIN_ID Domain ID
CONFIG_LOG_INPLACE_PROCESS Enable in place processing
CONFIG_LOG_MAX_LEVEL Maximal log level compiled in the system
CONFIG_LOG_MGMT_BODY_LEN Maximum log body length
CONFIG_LOG_MGMT_CHUNK_SIZE Maximum chunk size for log downloads
CONFIG_LOG_MGMT_NAME_LEN Maximum log name length
CONFIG_LOG_MODE_NO_OVERFLOW New logs are dropped
CONFIG_LOG_MODE_OVERFLOW Oldest logs are discarded
CONFIG_LOG_OVERRIDE_LEVEL Override lowest log level
CONFIG_LOG_PRINTK Enable processing of printk messages.
CONFIG_LOG_PRINTK_MAX_STRING_LENGTH Maximum string length supported by LOG_PRINTK
CONFIG_LOG_PROCESS_THREAD Enable internal thread for log processing
CONFIG_LOG_PROCESS_THREAD_PRIO Priority of the log internal thread
CONFIG_LOG_PROCESS_THREAD_SLEEP_MS Set internal log processing thread sleep period
CONFIG_LOG_PROCESS_THREAD_STACK_SIZE Stack size for the internal log processing thread
CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD Amount of buffered logs which triggers processing thread.
CONFIG_LOG_RUNTIME_FILTERING Enable runtime reconfiguration of the logger
CONFIG_LOOPBACK_BULK_EP_MPS  
CONFIG_LP3943 LP3943 LED driver
CONFIG_LP3943_DEV_NAME LP3943 device name
CONFIG_LP3943_I2C_ADDRESS LP3943 I2C slave address
CONFIG_LP3943_I2C_MASTER_DEV_NAME I2C master where LP3943 is connected
CONFIG_LPD880X_STRIP Enable LPD880x SPI LED strip driver
CONFIG_LPD880X_STRIP_NAME Driver name
CONFIG_LPD880X_STRIP_SPI_BAUD_RATE Strip clock line frequency
CONFIG_LPD880X_STRIP_SPI_DEV_NAME SPI master to use to drive the strip
CONFIG_LPS22HB LPS22HB pressure and temperature
CONFIG_LPS22HB_DEV_NAME Device name
CONFIG_LPS22HB_I2C_ADDR I2C address
CONFIG_LPS22HB_I2C_MASTER_DEV_NAME I2C master where LPS22HB is connected
CONFIG_LPS22HB_SAMPLING_RATE Output data rate
CONFIG_LPS25HB LPS25HB pressure and temperature
CONFIG_LPS25HB_DEV_NAME Device name
CONFIG_LPS25HB_I2C_ADDR I2C address
CONFIG_LPS25HB_I2C_MASTER_DEV_NAME I2C master where LPS25HB is connected
CONFIG_LPS25HB_SAMPLING_RATE Output data rate
CONFIG_LSM6DS0 LSM6DS0 I2C accelerometer and gyroscope Chip
CONFIG_LSM6DS0_ACCEL_ENABLE_X_AXIS Enable accelerometer X axis
CONFIG_LSM6DS0_ACCEL_ENABLE_Y_AXIS Enable accelerometer Y axis
CONFIG_LSM6DS0_ACCEL_ENABLE_Z_AXIS Enable accelerometer Z axis
CONFIG_LSM6DS0_ACCEL_FULLSCALE Accelerometer full-scale range
CONFIG_LSM6DS0_ACCEL_SAMPLING_RATE Output data rate
CONFIG_LSM6DS0_DEV_NAME LSM6DS0 device name
CONFIG_LSM6DS0_ENABLE_TEMP Enable temperature
CONFIG_LSM6DS0_GYRO_ENABLE_X_AXIS Enable gyroscope X axis
CONFIG_LSM6DS0_GYRO_ENABLE_Y_AXIS Enable gyroscope Y axis
CONFIG_LSM6DS0_GYRO_ENABLE_Z_AXIS Enable gyroscope Z axis
CONFIG_LSM6DS0_GYRO_FULLSCALE Gyroscope full-scale range
CONFIG_LSM6DS0_GYRO_SAMPLING_RATE Output data rate
CONFIG_LSM6DS0_I2C_ADDR LSM6DS0 I2C address
CONFIG_LSM6DS0_I2C_MASTER_DEV_NAME I2C master where LSM6DS0 chip is connected
CONFIG_LSM6DSL LSM6DSL I2C/SPI accelerometer and gyroscope Chip
CONFIG_LSM6DSL_ACCEL_FS Accelerometer full-scale range
CONFIG_LSM6DSL_ACCEL_ODR Accelerometer Output data rate frequency
CONFIG_LSM6DSL_DEV_NAME LSM6DSL device name
CONFIG_LSM6DSL_ENABLE_INTERNAL_PULLUP Enabled internals pull-up resistors
CONFIG_LSM6DSL_ENABLE_TEMP Enable temperature
CONFIG_LSM6DSL_EXT0_LIS2MDL LIS2MDL
CONFIG_LSM6DSL_EXT0_LPS22HB LPS22HB
CONFIG_LSM6DSL_GPIO_DEV_NAME GPIO device
CONFIG_LSM6DSL_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_LSM6DSL_GYRO_FS Gyroscope full-scale range
CONFIG_LSM6DSL_GYRO_ODR Gyroscope Output data rate frequency
CONFIG_LSM6DSL_I2C I2C Interface
CONFIG_LSM6DSL_I2C_ADDR LSM6DSL I2C address
CONFIG_LSM6DSL_I2C_MASTER_DEV_NAME I2C master name where LSM6DSL chip is connected
CONFIG_LSM6DSL_SENSORHUB Enable I2C sensorhub feature
CONFIG_LSM6DSL_SPI SPI Interface
CONFIG_LSM6DSL_SPI_BUS_FREQ LSM6DSL SPI bus speed in Hz
CONFIG_LSM6DSL_SPI_GPIO_CS LSM6DSL SPI CS through a GPIO pin
CONFIG_LSM6DSL_SPI_GPIO_CS_DRV_NAME GPIO driver’s name to use to drive SPI CS through
CONFIG_LSM6DSL_SPI_GPIO_CS_PIN GPIO PIN to use to drive SPI CS through
CONFIG_LSM6DSL_SPI_MASTER_DEV_NAME SPI master name where LSM6DSL chip is connected
CONFIG_LSM6DSL_SPI_SELECT_SLAVE LSM6DSL SPI slave select pin
CONFIG_LSM6DSL_THREAD_PRIORITY Thread priority
CONFIG_LSM6DSL_THREAD_STACK_SIZE Thread stack size
CONFIG_LSM6DSL_TRIGGER  
CONFIG_LSM6DSL_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_LSM6DSL_TRIGGER_NONE No trigger
CONFIG_LSM6DSL_TRIGGER_OWN_THREAD Use own thread
CONFIG_LSM9DS0_GYRO LSM9DS0 I2C gyroscope Chip
CONFIG_LSM9DS0_GYRO_DEV_NAME LSM9DS0_GYRO device name
CONFIG_LSM9DS0_GYRO_FULLSCALE_2000 2000 DPS
CONFIG_LSM9DS0_GYRO_FULLSCALE_245 245 DPS
CONFIG_LSM9DS0_GYRO_FULLSCALE_500 500 DPS
CONFIG_LSM9DS0_GYRO_FULLSCALE_RUNTIME Enable dynamic full-scale
CONFIG_LSM9DS0_GYRO_GPIO_DRDY_DEV_NAME GPIO device where LSM9DS0_GYRO data ready interrupt is connected
CONFIG_LSM9DS0_GYRO_GPIO_DRDY_INT_PIN GPIO pin number for the data ready interrupt pin
CONFIG_LSM9DS0_GYRO_I2C_ADDR LSM9DS0_GYRO I2C slave address
CONFIG_LSM9DS0_GYRO_I2C_MASTER_DEV_NAME I2C master where LSM9DS0 gyroscope is connected
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_190 190 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_380 380 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_760 760 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_95 95 Hz
CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate
CONFIG_LSM9DS0_GYRO_THREAD_STACK_SIZE Thread stack size
CONFIG_LSM9DS0_GYRO_TRIGGERS Enable triggers
CONFIG_LSM9DS0_GYRO_TRIGGER_DRDY Enable data ready trigger
CONFIG_LSM9DS0_MFD LSM9DS0 I2C accelerometer, magnetometer and temperature sensor chip
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE Enable accelerometer
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_X Enable accelerometer X axis
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_Y Enable accelerometer Y axis
CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_Z Enable accelerometer Z axis
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_16 16G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_2 2G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_4 4G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_6 6G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_8 8G
CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_RUNTIME Enable dynamic full-scale for accelerometer
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_0 0 Hz (power down)
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_100 100 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_12_5 12.5 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_1600 1600 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_200 200 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_25 25 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_3_125 3.125 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_400 400 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_50 50 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_6_25 6.25 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_800 800 Hz
CONFIG_LSM9DS0_MFD_ACCEL_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate for accelerometer
CONFIG_LSM9DS0_MFD_DEV_NAME LSM9DS0_MFD device name
CONFIG_LSM9DS0_MFD_I2C_ADDR LSM9DS0_MFD I2C slave address
CONFIG_LSM9DS0_MFD_I2C_MASTER_DEV_NAME I2C master where LSM9DS0 gyroscope is connected
CONFIG_LSM9DS0_MFD_MAGN_ENABLE Enable magnetometer
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_12 12 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_2 2 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_4 4 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_8 8 Gauss
CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_RUNTIME Enable dynamic full-scale for magnetometer
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_100 100 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_12_5 12.5 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_25 25 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_3_125 3.125 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_50 50 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_6_25 6.25 Hz
CONFIG_LSM9DS0_MFD_MAGN_SAMPLING_RATE_RUNTIME Enable dynamic sampling rate for magnetometer
CONFIG_LSM9DS0_MFD_TEMP_ENABLE Enable temperature sensor
CONFIG_LWM2M OMA LWM2M protocol stack
CONFIG_LWM2M_COAP_BLOCK_SIZE LWM2M CoAP block-wise transfer size
CONFIG_LWM2M_DEVICE_ERROR_CODE_MAX Maximum # of device obj error codes to store
CONFIG_LWM2M_DEVICE_PWRSRC_MAX Maximum # of device power source records
CONFIG_LWM2M_ENGINE_DEFAULT_LIFETIME LWM2M engine default server connection lifetime
CONFIG_LWM2M_ENGINE_MAX_MESSAGES LWM2M engine max. message object
CONFIG_LWM2M_ENGINE_MAX_OBSERVER Maximum # of observable LWM2M resources
CONFIG_LWM2M_ENGINE_MAX_PENDING LWM2M engine max. pending objects
CONFIG_LWM2M_ENGINE_MAX_REPLIES LWM2M engine max. reply objects
CONFIG_LWM2M_ENGINE_STACK_SIZE LWM2M engine stack size
CONFIG_LWM2M_FIRMWARE_UPDATE_OBJ_SUPPORT Firmware Update object support
CONFIG_LWM2M_FIRMWARE_UPDATE_PULL_COAP_PROXY_ADDR CoAP proxy network address
CONFIG_LWM2M_FIRMWARE_UPDATE_PULL_COAP_PROXY_SUPPORT Firmware Update object pull via CoAP-CoAP/HTTP proxy support
CONFIG_LWM2M_FIRMWARE_UPDATE_PULL_LOCAL_PORT LWM2M client firmware pull local port
CONFIG_LWM2M_FIRMWARE_UPDATE_PULL_SUPPORT Firmware Update object pull support
CONFIG_LWM2M_IPSO_LIGHT_CONTROL IPSO Light Control Support
CONFIG_LWM2M_IPSO_LIGHT_CONTROL_INSTANCE_COUNT Maximum # of IPSO Light Control object instances
CONFIG_LWM2M_IPSO_SUPPORT IPSO Alliance Smart Object Support
CONFIG_LWM2M_IPSO_TEMP_SENSOR IPSO Temperature Sensor Support
CONFIG_LWM2M_IPSO_TEMP_SENSOR_INSTANCE_COUNT Maximum # of IPSO Temperature Sensor object instances
CONFIG_LWM2M_LOCAL_PORT LWM2M client port
CONFIG_LWM2M_NUM_ATTR Maximum # of LWM2M attributes
CONFIG_LWM2M_NUM_BLOCK1_CONTEXT Maximum # of LWM2M block1 contexts
CONFIG_LWM2M_PEER_PORT LWM2M server port
CONFIG_LWM2M_RD_CLIENT_SUPPORT support for LWM2M client bootstrap/registration state machine
CONFIG_LWM2M_RW_JSON_SUPPORT support for JSON writer
CONFIG_LWM2M_SECURITY_INSTANCE_COUNT Maximum # of LWM2M Security object instances
CONFIG_LWM2M_SERVER_INSTANCE_COUNT Maximum # of LWM2M Server object instances
CONFIG_MAIN_STACK_SIZE Size of stack for initialization and main thread
CONFIG_MAIN_THREAD_PRIORITY Priority of initialization/main thread
CONFIG_MASS_STORAGE_BULK_EP_MPS  
CONFIG_MASS_STORAGE_DISK_NAME Mass storage disk or drive name
CONFIG_MAX30101 MAX30101 Pulse Oximeter and Heart Rate Sensor
CONFIG_MAX30101_ADC_RGE ADC range control
CONFIG_MAX30101_FIFO_A_FULL FIFO almost full value
CONFIG_MAX30101_FIFO_ROLLOVER_EN FIFO rolls on full
CONFIG_MAX30101_HEART_RATE_MODE Heart rate mode
CONFIG_MAX30101_I2C_NAME I2C device name
CONFIG_MAX30101_LED1_PA LED1 (red) pulse amplitude
CONFIG_MAX30101_LED2_PA LED2 (IR) pulse amplitude
CONFIG_MAX30101_LED3_PA LED2 (green) pulse amplitude
CONFIG_MAX30101_MULTI_LED_MODE Multi-LED mode
CONFIG_MAX30101_NAME Driver name
CONFIG_MAX30101_SLOT1 Slot 1
CONFIG_MAX30101_SLOT2 Slot 2
CONFIG_MAX30101_SLOT3 Slot 3
CONFIG_MAX30101_SLOT4 Slot 4
CONFIG_MAX30101_SMP_AVE Sample averaging
CONFIG_MAX30101_SPO2_MODE SpO2 mode
CONFIG_MAX30101_SR ADC sample rate control
CONFIG_MAX44009 MAX44009 Light Sensor
CONFIG_MAX44009_DRV_NAME Driver name
CONFIG_MAX44009_I2C_ADDR MAX44009 I2C address
CONFIG_MAX44009_I2C_DEV_NAME I2C master where MAX44009 is connected
CONFIG_MAX_DOMAIN_PARTITIONS Maximum number of partitions per memory domain
CONFIG_MAX_IRQ_LINES Number of IRQ lines
CONFIG_MAX_IRQ_PER_AGGREGATOR Max IRQs per interrupt aggregator
CONFIG_MAX_PTHREAD_COUNT Maximum pthread count in POSIX application
CONFIG_MAX_THREAD_BYTES Bytes to use when tracking object thread permissions
CONFIG_MAX_TIMER_COUNT Maximum timer count in POSIX application
CONFIG_MBEDTLS mbedTLS Support
CONFIG_MBEDTLS_BUILTIN Enable mbedTLS integrated sources
CONFIG_MBEDTLS_CFG_FILE mbed TLS configuration file
CONFIG_MBEDTLS_DEBUG mbed TLS debug activation
CONFIG_MBEDTLS_DEBUG_LEVEL mbed TLS default debug level
CONFIG_MBEDTLS_ENABLE_HEAP Enable global heap for mbed TLS
CONFIG_MBEDTLS_HEAP_SIZE Heap size for mbed TLS
CONFIG_MBEDTLS_INSTALL_PATH mbedTLS install path
CONFIG_MBEDTLS_LIBRARY Enable mbedTLS external library
CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN Max payload size for TLS protocol message
CONFIG_MBEDTLS_TEST Compile internal self test functions
CONFIG_MCG_FCRDIV Fast internal reference clock divider
CONFIG_MCG_FRDIV FLL external reference divider
CONFIG_MCG_PRDIV0 PLL external reference divider
CONFIG_MCG_VDIV0 VCO 0 divider
CONFIG_MCP9808 MCP9808 temperature sensor
CONFIG_MCP9808_DEV_NAME MCP9808 device name
CONFIG_MCP9808_GPIO_CONTROLLER GPIO controller for MCP9808 interrupt
CONFIG_MCP9808_GPIO_PIN GPIO pin for MCP9808 interrupt
CONFIG_MCP9808_I2C_ADDR MCP9808 I2C slave address
CONFIG_MCP9808_I2C_DEV_NAME I2C master where MCP9808 is connected
CONFIG_MCP9808_THREAD_PRIORITY MCP9808 thread priority
CONFIG_MCP9808_THREAD_STACK_SIZE Sensor delayed work thread stack size
CONFIG_MCP9808_TRIGGER  
CONFIG_MCP9808_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_MCP9808_TRIGGER_NONE No trigger
CONFIG_MCP9808_TRIGGER_OWN_THREAD Use own thread
CONFIG_MCR20A_CLK_OUT_16MHZ 16 MHz
CONFIG_MCR20A_CLK_OUT_1MHZ 1 MHz
CONFIG_MCR20A_CLK_OUT_250KHZ 250 kHz
CONFIG_MCR20A_CLK_OUT_32768HZ 32768 Hz
CONFIG_MCR20A_CLK_OUT_32MHZ 32 MHz
CONFIG_MCR20A_CLK_OUT_4MHZ 4 MHz
CONFIG_MCR20A_CLK_OUT_62500HZ 62500 Hz
CONFIG_MCR20A_CLK_OUT_8MHZ 8 MHz
CONFIG_MCR20A_CLK_OUT_DISABLED Disabled
CONFIG_MCR20A_GPIO_IRQ_B_NAME GPIO device used for IRQ_B output of MCR20A
CONFIG_MCR20A_GPIO_IRQ_B_PIN GPIO pin connected to IRQ_B output of MCR20A
CONFIG_MCR20A_GPIO_RESET_NAME GPIO device used for RESET input of MCR20A
CONFIG_MCR20A_GPIO_RESET_PIN GPIO pin connected to RESET input of MCR20A
CONFIG_MCR20A_IS_PART_OF_KW2XD_SIP MCR20A device is part of KW2xD SiP
CONFIG_MCUBOOT_IMG_MANAGER Image manager for mcuboot
CONFIG_MCUMGR mcumgr Support
CONFIG_MCUMGR_BUF_COUNT Number of mcumgr buffers
CONFIG_MCUMGR_BUF_SIZE Size of each mcumgr buffer
CONFIG_MCUMGR_BUF_USER_DATA_SIZE Size of mcumgr buffer user data
CONFIG_MCUMGR_CMD_FS_MGMT Enable mcumgr handlers for file management
CONFIG_MCUMGR_CMD_IMG_MGMT Enable mcumgr handlers for image management
CONFIG_MCUMGR_CMD_LOG_MGMT Enable mcumgr handlers for log management
CONFIG_MCUMGR_CMD_OS_MGMT Enable mcumgr handlers for OS management
CONFIG_MCUMGR_CMD_STAT_MGMT Enable mcumgr handlers for statistics management
CONFIG_MCUMGR_SMP_BT Bluetooth mcumgr SMP transport
CONFIG_MCUMGR_SMP_SHELL Shell mcumgr SMP transport
CONFIG_MCUMGR_SMP_SHELL_MTU Shell SMP MTU
CONFIG_MCUMGR_SMP_UART UART mcumgr SMP transport
CONFIG_MCUMGR_SMP_UART_MTU UART SMP MTU
CONFIG_MDNS_RESOLVER Enable mDNS support
CONFIG_MDNS_RESOLVER_ADDITIONAL_BUF_CTR Additional DNS buffers
CONFIG_MDNS_RESPONDER mDNS responder
CONFIG_MDNS_RESPONDER_INIT_PRIO Startup priority for the mDNS responder init
CONFIG_MDNS_RESPONDER_TTL Time-to-Live of returned DNS name
CONFIG_MICROBIT_DISPLAY BBC micro:bit 5x5 LED Display support
CONFIG_MICROBIT_DISPLAY_PIN_GRANULARITY Access the GPIO on a per-pin instead of per-port basis
CONFIG_MICROBIT_DISPLAY_STR_MAX Maximum length of strings that can be shown on the display
CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE Size of the minimal libc malloc arena
CONFIG_MMA8451Q MMA8451Q Accelerometer driver
CONFIG_MMA8451Q_I2C_ADDRESS I2C address for MMA8451Q Sensor
CONFIG_MMA8451Q_I2C_NAME I2C device name
CONFIG_MMA8451Q_NAME Device name
CONFIG_MMA8451Q_RANGE_2G 2g (0.244 mg/LSB)
CONFIG_MMA8451Q_RANGE_4G 4g (0.488 mg/LSB)
CONFIG_MMA8451Q_RANGE_8G 8g (0.976 mg/LSB)
CONFIG_MMA8451Q_WHOAMI WHOAMI value
CONFIG_MODEM Modem Drivers
CONFIG_MODEM_RECEIVER Enable modem receiver helper driver
CONFIG_MODEM_RECEIVER_MAX_CONTEXTS Maximum number of modem receiver contexts
CONFIG_MODEM_SHELL Enable modem shell utilities
CONFIG_MODEM_WNCM14A2A Enable Wistron LTE-M modem driver
CONFIG_MODEM_WNCM14A2A_APN_NAME APN name for establishing network connection
CONFIG_MODEM_WNCM14A2A_INIT_PRIORITY WNC-M14A2A driver init priority
CONFIG_MODEM_WNCM14A2A_RX_STACK_SIZE Size of the stack for the WNC-M14A2A modem driver RX thread
CONFIG_MODEM_WNCM14A2A_RX_WORKQ_STACK_SIZE Size of the stack for the WNC-M14A2A modem driver work queue
CONFIG_MPU6050 MPU6050 Six-Axis Motion Tracking Device
CONFIG_MPU6050_ACCEL_FS Accelerometer full-scale range
CONFIG_MPU6050_GPIO_DEV_NAME GPIO device
CONFIG_MPU6050_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_MPU6050_GYRO_FS Gyroscope full-scale range
CONFIG_MPU6050_I2C_ADDR I2C address
CONFIG_MPU6050_I2C_MASTER_DEV_NAME I2C master where MPU6050 is connected
CONFIG_MPU6050_NAME Driver name
CONFIG_MPU6050_THREAD_PRIORITY Thread priority
CONFIG_MPU6050_THREAD_STACK_SIZE Thread stack size
CONFIG_MPU6050_TRIGGER  
CONFIG_MPU6050_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_MPU6050_TRIGGER_NONE No trigger
CONFIG_MPU6050_TRIGGER_OWN_THREAD Use own thread
CONFIG_MPU9150 Enable MPU9180 support
CONFIG_MPU9150_I2C_ADDR MPU9180 I2C address
CONFIG_MPU_ALLOW_FLASH_WRITE Add MPU access to write to flash
CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT  
CONFIG_MPU_STACK_GUARD Thread Stack Guards / Thread Stack Guards
CONFIG_MP_NUM_CPUS Number of CPUs/cores
CONFIG_MQTT_ADDITIONAL_BUFFER_CTR Additional buffers available for the MQTT application
CONFIG_MQTT_LIB MQTT Library Support
CONFIG_MQTT_LIB_TLS Enable TLS support for the MQTT application
CONFIG_MQTT_MSG_MAX_SIZE Max size of a MQTT message
CONFIG_MQTT_SUBSCRIBE_MAX_TOPICS Max number of topics to subscribe to
CONFIG_MQUEUE_NAMELEN_MAX Maximum size of a name length
CONFIG_MSG_COUNT_MAX Maximum number of messages in message queue
CONFIG_MSG_SIZE_MAX Maximum size of a message
CONFIG_MULTITHREADING Multi-threading
CONFIG_MULTI_LEVEL_INTERRUPTS Multi-level Interrupts
CONFIG_MVIC Intel Quark D2000 Interrupt Controller (MVIC)
CONFIG_MVIC_TIMER_IRQ IRQ line to use for timer interrupt
CONFIG_NATIVE_APPLICATION Build as a native host application
CONFIG_NATIVE_POSIX_CONSOLE Use the host terminal for console
CONFIG_NATIVE_POSIX_CONSOLE_INIT_PRIORITY Init priority
CONFIG_NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME Slow down execution to real time
CONFIG_NATIVE_POSIX_STDIN_CONSOLE Use the host terminal stdin
CONFIG_NATIVE_POSIX_STDOUT_CONSOLE Print to the host terminal stdout
CONFIG_NATIVE_POSIX_TIMER (POSIX) native_posix timer driver
CONFIG_NATIVE_STDIN_POLL_PERIOD Polling period for stdin
CONFIG_NATIVE_STDIN_PRIO Priority of the stdin polling thread
CONFIG_NESTED_INTERRUPTS Enable nested interrupts
CONFIG_NETWORKING Link layer and IP networking support
CONFIG_NET_6LO Enable 6lowpan IPv6 Compression library
CONFIG_NET_6LO_CONTEXT Enable 6lowpan context based compression
CONFIG_NET_APP Network application API support [EXPERIMENTAL]
CONFIG_NET_APP_CLIENT Enable client support
CONFIG_NET_APP_DTLS Enable DTLS support for UDP applications
CONFIG_NET_APP_DTLS_TIMEOUT DTLS session timeout
CONFIG_NET_APP_SERVER Enable server support
CONFIG_NET_APP_SERVER_NUM_CONN Number of simultaneous incoming connections
CONFIG_NET_APP_TLS Enable TLS support for TCP applications
CONFIG_NET_APP_TLS_STACK_SIZE TLS handler thread stack size
CONFIG_NET_ARP Enable ARP
CONFIG_NET_ARP_TABLE_SIZE Number of entries in ARP table.
CONFIG_NET_BUF Network buffer support
CONFIG_NET_BUF_DATA_SIZE Size of each network data fragment
CONFIG_NET_BUF_LOG Network buffer logging
CONFIG_NET_BUF_POOL_USAGE Network buffer pool usage tracking
CONFIG_NET_BUF_RX_COUNT How many network buffers are allocated for receiving data
CONFIG_NET_BUF_SIMPLE_LOG Network buffer memory debugging
CONFIG_NET_BUF_TX_COUNT How many network buffers are allocated for sending data
CONFIG_NET_BUF_USER_DATA_SIZE Size of user_data available in every network buffer
CONFIG_NET_BUF_WARN_ALLOC_INTERVAL Interval of Network buffer allocation warnings
CONFIG_NET_CONFIG_AUTO_INIT Init networking support automatically during device startup
CONFIG_NET_CONFIG_BT_NODE Enable Bluetooth node support
CONFIG_NET_CONFIG_IEEE802154_CHANNEL IEEE 802.15.4 channel
CONFIG_NET_CONFIG_IEEE802154_DEV_NAME IEEE 802.15.4 device name
CONFIG_NET_CONFIG_IEEE802154_PAN_ID IEEE 802.15.4 PAN ID
CONFIG_NET_CONFIG_IEEE802154_RADIO_TX_POWER IEEE 802.15.4 TX power in dbm
CONFIG_NET_CONFIG_IEEE802154_SECURITY_KEY IEEE 802.15.4 security key
CONFIG_NET_CONFIG_IEEE802154_SECURITY_KEY_MODE IEEE 802.15.4 security key mode
CONFIG_NET_CONFIG_IEEE802154_SECURITY_LEVEL IEEE 802.15.4 security level (0-7)
CONFIG_NET_CONFIG_INIT_PRIO Startup priority for the network application init
CONFIG_NET_CONFIG_INIT_TIMEOUT How long to wait for networking to be ready and available
CONFIG_NET_CONFIG_MY_IPV4_ADDR My IPv4 address
CONFIG_NET_CONFIG_MY_IPV4_GW My IPv4 gateway
CONFIG_NET_CONFIG_MY_IPV4_NETMASK My IPv4 netmask
CONFIG_NET_CONFIG_MY_IPV6_ADDR My IPv6 address
CONFIG_NET_CONFIG_NEED_IPV4 This application wants IPv4 support
CONFIG_NET_CONFIG_NEED_IPV6 This application wants IPv6 support
CONFIG_NET_CONFIG_NEED_IPV6_ROUTER This application wants IPv6 router to exists
CONFIG_NET_CONFIG_PEER_IPV4_ADDR Peer IPv4 address
CONFIG_NET_CONFIG_PEER_IPV6_ADDR Peer IPv6 address
CONFIG_NET_CONFIG_SETTINGS Set network settings for applications
CONFIG_NET_CONN_CACHE Cache network connections
CONFIG_NET_CONTEXT_CHECK Check options when calling various net_context functions
CONFIG_NET_CONTEXT_NET_PKT_POOL Enable net_buf TX pool / context
CONFIG_NET_CONTEXT_PRIORITY Add priority support to net_context
CONFIG_NET_CONTEXT_SYNC_RECV Support synchronous functionality in net_context_recv() API
CONFIG_NET_DEBUG_6LO Enable 6lowpan debug
CONFIG_NET_DEBUG_APP Debug net app library
CONFIG_NET_DEBUG_ARP Debug IPv4 ARP
CONFIG_NET_DEBUG_COAP Debug COAP
CONFIG_NET_DEBUG_CONFIG Debug net config library
CONFIG_NET_DEBUG_CONN Debug connection handling
CONFIG_NET_DEBUG_CONTEXT Debug network context allocation
CONFIG_NET_DEBUG_CORE Debug core IP stack
CONFIG_NET_DEBUG_DHCPV4 Debug DHCPv4 client
CONFIG_NET_DEBUG_DNS_RESOLVE Debug DNS resolver
CONFIG_NET_DEBUG_GPTP Enable Debug Information for gPTP
CONFIG_NET_DEBUG_HOSTNAME Debug hostname configuration
CONFIG_NET_DEBUG_HTTP Debug HTTP
CONFIG_NET_DEBUG_HTTP_CONN Debug HTTP connections
CONFIG_NET_DEBUG_ICMPV4 Debug ICMPv4
CONFIG_NET_DEBUG_ICMPV6 Debug ICMPv6
CONFIG_NET_DEBUG_IF Debug network interface code
CONFIG_NET_DEBUG_IPV4 Debug core IPv4
CONFIG_NET_DEBUG_IPV4_AUTOCONF Debug IPv4 autoconf client
CONFIG_NET_DEBUG_IPV6 Debug core IPv6
CONFIG_NET_DEBUG_IPV6_NBR_CACHE Debug IPv6 neighbor cache
CONFIG_NET_DEBUG_L2_BT Debug Bluetooth L2 layer
CONFIG_NET_DEBUG_L2_ETHERNET Debug Ethernet L2 layer
CONFIG_NET_DEBUG_L2_IEEE802154 Enable IEEE 802.15.4 stack debug messages
CONFIG_NET_DEBUG_L2_IEEE802154_DISPLAY_PACKET Enable IEEE 802.15.4 packet display
CONFIG_NET_DEBUG_L2_IEEE802154_DISPLAY_PACKET_FULL Print-out both RX and TX packets
CONFIG_NET_DEBUG_L2_IEEE802154_DISPLAY_PACKET_RX Print-out only RX packets
CONFIG_NET_DEBUG_L2_IEEE802154_DISPLAY_PACKET_TX Print-out only TX packets
CONFIG_NET_DEBUG_L2_IEEE802154_FRAGMENT Enable debug support for IEEE 802.15.4 fragmentation
CONFIG_NET_DEBUG_L2_WIFI_MGMT Debug WiFi Management layer
CONFIG_NET_DEBUG_LLDP Debug LLDP
CONFIG_NET_DEBUG_LLMNR_RESPONDER Debug LLMNR responder
CONFIG_NET_DEBUG_MDNS_RESPONDER Debug mDNS responder
CONFIG_NET_DEBUG_MGMT_EVENT Enable debug output on Net MGMT event core
CONFIG_NET_DEBUG_MGMT_EVENT_STACK Enable stack analysis output on Net MGMT event core
CONFIG_NET_DEBUG_NET_OFFLOAD Debug Net Offload Layer
CONFIG_NET_DEBUG_NET_PKT Debug network packet and buffer allocation
CONFIG_NET_DEBUG_NET_PKT_ALL Debug network packet and buffer individual allocation
CONFIG_NET_DEBUG_NET_PKT_EXTERNALS How many external network packet allocations
CONFIG_NET_DEBUG_ROUTE Debug route management
CONFIG_NET_DEBUG_RPL Debug RPL
CONFIG_NET_DEBUG_SNTP Debug SNTP
CONFIG_NET_DEBUG_SOCKETS Debug BSD Sockets compatible API calls
CONFIG_NET_DEBUG_TC Debug network traffic class code
CONFIG_NET_DEBUG_TCP Debug TCP
CONFIG_NET_DEBUG_TRICKLE Debug Trickle algorithm
CONFIG_NET_DEBUG_UDP Debug UDP
CONFIG_NET_DEBUG_UTILS Debug utility functions in IP stack
CONFIG_NET_DEBUG_WEBSOCKET Debug websocket library
CONFIG_NET_DEFAULT_IF_BLUETOOTH Bluetooth
CONFIG_NET_DEFAULT_IF_DUMMY Dummy testing interface
CONFIG_NET_DEFAULT_IF_ETHERNET Ethernet
CONFIG_NET_DEFAULT_IF_FIRST First available interface
CONFIG_NET_DEFAULT_IF_IEEE802154 IEEE 802.15.4
CONFIG_NET_DEFAULT_IF_OFFLOAD Offloaded interface
CONFIG_NET_DHCPV4 Enable DHCPv4 client
CONFIG_NET_GPTP Enable IEEE 802.1AS (gPTP) support [EXPERIMENTAL]
CONFIG_NET_GPTP_ANNOUNCE_RECEIPT_TIMEOUT Number of announce intervals to wait
CONFIG_NET_GPTP_INIT_LOG_ANNOUNCE_ITV Set initial announce interval in Log2 base
CONFIG_NET_GPTP_INIT_LOG_PDELAY_REQ_ITV Set initial pdelay request interval in Log2 base
CONFIG_NET_GPTP_INIT_LOG_SYNC_ITV Set initial sync interval in Log2 base
CONFIG_NET_GPTP_NEIGHBOR_PROP_DELAY_THR Set neighbor propagation delay threshold (ns)
CONFIG_NET_GPTP_NUM_PORTS Number of gPTP ports
CONFIG_NET_GPTP_PATH_TRACE_ELEMENTS How many path trace elements to track
CONFIG_NET_GPTP_STATISTICS Collect gPTP statistics
CONFIG_NET_GPTP_SYNC_RECEIPT_TIMEOUT Number of sync intervals to wait
CONFIG_NET_GPTP_USE_DEFAULT_CLOCK_UPDATE Use a default clock update function
CONFIG_NET_GPTP_VLAN Run gPTP over VLAN link
CONFIG_NET_GPTP_VLAN_TAG VLAN tag to use
CONFIG_NET_HOSTNAME The hostname of this device
CONFIG_NET_HOSTNAME_ENABLE Add hostname to the device
CONFIG_NET_HOSTNAME_UNIQUE Make hostname unique
CONFIG_NET_IF_IPV6_PREFIX_COUNT Max number of IPv6 prefixes per network interface
CONFIG_NET_IF_MAX_IPV4_COUNT Max number of IPv4 network interfaces in the system
CONFIG_NET_IF_MAX_IPV6_COUNT Max number of IPv6 network interfaces in the system
CONFIG_NET_IF_MCAST_IPV4_ADDR_COUNT Max number of multicast IPv4 addresses per network interface
CONFIG_NET_IF_MCAST_IPV6_ADDR_COUNT Max number of multicast IPv6 addresses per network interface
CONFIG_NET_IF_UNICAST_IPV4_ADDR_COUNT Max number of unicast IPv4 addresses per network interface
CONFIG_NET_IF_UNICAST_IPV6_ADDR_COUNT Max number of unicast IPv6 addresses per network interface
CONFIG_NET_INITIAL_HOP_LIMIT Initial hop limit for a connection
CONFIG_NET_INITIAL_TTL Initial time to live for a connection
CONFIG_NET_INIT_PRIO  
CONFIG_NET_IPV4 IPv4
CONFIG_NET_IPV4_AUTO Enable IPv4 autoconfiguration [EXPERIMENTAL]
CONFIG_NET_IPV6 IPv6
CONFIG_NET_IPV6_DAD Activate duplicate address detection
CONFIG_NET_IPV6_FRAGMENT Support IPv6 fragmentation
CONFIG_NET_IPV6_FRAGMENT_MAX_COUNT How many packets to reassemble at a time
CONFIG_NET_IPV6_FRAGMENT_TIMEOUT How long to wait the fragments to receive
CONFIG_NET_IPV6_MAX_NEIGHBORS How many IPv6 neighbors are supported
CONFIG_NET_IPV6_MLD Multicast Listener Discovery support
CONFIG_NET_IPV6_NBR_CACHE Neighbor cache
CONFIG_NET_IPV6_ND Activate neighbor discovery
CONFIG_NET_IPV6_RA_RDNSS Support RA RDNSS option
CONFIG_NET_IP_ADDR_CHECK Check IP address validity before sending IP packet
CONFIG_NET_L2_BT Enable Bluetooth support
CONFIG_NET_L2_BT_MGMT Enable Bluetooth Network Management support
CONFIG_NET_L2_BT_SEC_LEVEL Security level of Bluetooth Link
CONFIG_NET_L2_BT_SHELL Enable Bluetooth shell module
CONFIG_NET_L2_BT_ZEP1656 *Workaround to work with Linux.*
CONFIG_NET_L2_DUMMY Enable dummy l2 layer
CONFIG_NET_L2_ETHERNET Enable Ethernet support
CONFIG_NET_L2_ETHERNET_MGMT Enable Ethernet network management interface
CONFIG_NET_L2_IEEE802154 Enable IEEE 802.15.4 Radio
CONFIG_NET_L2_IEEE802154_ACK_REPLY Enable IEEE 802.15.4 ACK reply logic
CONFIG_NET_L2_IEEE802154_FRAGMENT Enable 802.15.4 fragmentation support
CONFIG_NET_L2_IEEE802154_FRAGMENT_REASS_CACHE_SIZE IEEE 802.15.4 Reassembly cache size
CONFIG_NET_L2_IEEE802154_MGMT  
CONFIG_NET_L2_IEEE802154_RADIO_ALOHA IEEE 802.15.4 Aloha radio protocol
CONFIG_NET_L2_IEEE802154_RADIO_CSMA_CA IEEE 802.15.4 CSMA-CA radio protocol
CONFIG_NET_L2_IEEE802154_RADIO_CSMA_CA_MAX_BE CSMA MAC maximum backoff exponent
CONFIG_NET_L2_IEEE802154_RADIO_CSMA_CA_MAX_BO CSMA maximum backoffs
CONFIG_NET_L2_IEEE802154_RADIO_CSMA_CA_MIN_BE CSMA MAC minimum backoff exponent
CONFIG_NET_L2_IEEE802154_RADIO_DFLT_TX_POWER Default radio transmission power
CONFIG_NET_L2_IEEE802154_RADIO_TX_RETRIES Radio Transmission attempts
CONFIG_NET_L2_IEEE802154_REASSEMBLY_TIMEOUT IEEE 802.15.4 Reassembly timeout in seconds
CONFIG_NET_L2_IEEE802154_RFD Support Reduced Functionality Device level
CONFIG_NET_L2_IEEE802154_SECURITY Enable IEEE 802.15.4 security [EXPERIMENTAL]
CONFIG_NET_L2_IEEE802154_SECURITY_CRYPTO_DEV_NAME Crypto device name used for <en/de>cryption
CONFIG_NET_L2_IEEE802154_SHELL Enable IEEE 802.15.4 shell module
CONFIG_NET_L2_IEEE802154_SUB_GHZ  
CONFIG_NET_L2_OPENTHREAD OpenThread L2
CONFIG_NET_L2_WIFI_MGMT Enable WiFi Management support
CONFIG_NET_L2_WIFI_SHELL Enable WiFi shell module
CONFIG_NET_LLDP Enable LLDP
CONFIG_NET_LLDP_CHASSIS_ID Chassis ID value
CONFIG_NET_LLDP_CHASSIS_ID_MAC0 Chassis ID MAC Address Byte 0
CONFIG_NET_LLDP_CHASSIS_ID_MAC1 Chassis ID MAC Address Byte 1
CONFIG_NET_LLDP_CHASSIS_ID_MAC2 Chassis ID MAC Address Byte 2
CONFIG_NET_LLDP_CHASSIS_ID_MAC3 Chassis ID MAC Address Byte 3
CONFIG_NET_LLDP_CHASSIS_ID_MAC4 Chassis ID MAC Address Byte 4
CONFIG_NET_LLDP_CHASSIS_ID_MAC5 Chassis ID MAC Address Byte 5
CONFIG_NET_LLDP_CHASSIS_ID_SUBTYPE Chassis ID TLV subtype
CONFIG_NET_LLDP_END_LLDPDU_TLV_ENABLED Enable End of LLDPDU TLV
CONFIG_NET_LLDP_PORT_ID Port ID value
CONFIG_NET_LLDP_PORT_ID_MAC0 Chassis ID MAC Address Byte 0
CONFIG_NET_LLDP_PORT_ID_MAC1 Chassis ID MAC Address Byte 1
CONFIG_NET_LLDP_PORT_ID_MAC2 Chassis ID MAC Address Byte 2
CONFIG_NET_LLDP_PORT_ID_MAC3 Chassis ID MAC Address Byte 3
CONFIG_NET_LLDP_PORT_ID_MAC4 Chassis ID MAC Address Byte 4
CONFIG_NET_LLDP_PORT_ID_MAC5 Chassis ID MAC Address Byte 5
CONFIG_NET_LLDP_PORT_ID_SUBTYPE Port ID TLV subtype
CONFIG_NET_LLDP_TX_HOLD Multiplier of Tx Interval to result on Time to Live value
CONFIG_NET_LLDP_TX_INTERVAL Time between transmissions in seconds (msgTxInterval)
CONFIG_NET_LOG Enable network stack logging and debugging
CONFIG_NET_LOG_GLOBAL Enable global network stack logging
CONFIG_NET_LOOPBACK Net loopback driver
CONFIG_NET_MAX_6LO_CONTEXTS Number of supported 6CO (6lowpan contexts options)
CONFIG_NET_MAX_CONN How many network connections are supported
CONFIG_NET_MAX_CONTEXTS Number of network contexts to allocate
CONFIG_NET_MAX_MCAST_ROUTES Max number of multicast routing entries stored.
CONFIG_NET_MAX_NEXTHOPS Max number of next hop entries stored.
CONFIG_NET_MAX_ROUTERS How many routers are supported
CONFIG_NET_MAX_ROUTES Max number of routing entries stored.
CONFIG_NET_MGMT Network Management API
CONFIG_NET_MGMT_EVENT Add support for runtime network event notifications
CONFIG_NET_MGMT_EVENT_INFO Enable passing information along with an event
CONFIG_NET_MGMT_EVENT_QUEUE_SIZE Size of event queue
CONFIG_NET_MGMT_EVENT_STACK_SIZE Stack size for the inner thread handling event callbacks
CONFIG_NET_MGMT_EVENT_THREAD_PRIO Inner thread priority (use with care)
CONFIG_NET_OFFLOAD Offload IP stack [EXPERIMENTAL]
CONFIG_NET_PKT_RX_COUNT How many packet receives can be pending at the same time
CONFIG_NET_PKT_TIMESTAMP Enable network packet timestamp support
CONFIG_NET_PKT_TIMESTAMP_STACK_SIZE Timestamp thread stack size
CONFIG_NET_PKT_TX_COUNT How many packet sends can be pending at the same time
CONFIG_NET_PROMISCUOUS_MODE Enable promiscuous mode support [EXPERIMENTAL]
CONFIG_NET_RAW_MODE  
CONFIG_NET_ROUTE  
CONFIG_NET_ROUTE_MCAST  
CONFIG_NET_ROUTING IP routing between interfaces
CONFIG_NET_RPL Enable RPL (Ripple) support
CONFIG_NET_RPL_DAO_ACK Node expecting DAO ACK
CONFIG_NET_RPL_DAO_MAX_RETRANSMISSIONS Max DAO retransmissions
CONFIG_NET_RPL_DAO_SPECIFY_DAG Specify DAG when sending a DAO message.
CONFIG_NET_RPL_DAO_TIMER DAO sending timer value
CONFIG_NET_RPL_DEFAULT_INSTANCE Default DAG instance id
CONFIG_NET_RPL_DEFAULT_LIFETIME Default route lifetime.
CONFIG_NET_RPL_DEFAULT_LIFETIME_UNIT Default route lifetime unit.
CONFIG_NET_RPL_DIO_INTERVAL_DOUBLINGS Maximum amount of timer doublings.
CONFIG_NET_RPL_DIO_INTERVAL_MIN DIO interval.
CONFIG_NET_RPL_DIO_REDUNDANCY DIO redundancy.
CONFIG_NET_RPL_DIS_INTERVAL Default DIS interval
CONFIG_NET_RPL_DIS_SEND Send DIS periodically
CONFIG_NET_RPL_GROUNDED DAG grounded default value
CONFIG_NET_RPL_INIT_LINK_METRIC Initial link metric
CONFIG_NET_RPL_INSERT_HBH_OPTION Add RPL Hop-by-hop ext header to sent UDP packets
CONFIG_NET_RPL_L2_ANY Any network type
CONFIG_NET_RPL_L2_IEEE802154 IEEE 802.15.4
CONFIG_NET_RPL_MAX_DAG_PER_INSTANCE Maximum number of DAGs within an instance
CONFIG_NET_RPL_MAX_INSTANCES Maximum number of RPL instances
CONFIG_NET_RPL_MAX_PARENTS Maximum number of parents for one node
CONFIG_NET_RPL_MCAST_LIFETIME Multicast route lifetime.
CONFIG_NET_RPL_MC_ENERGY Energy based routing metric
CONFIG_NET_RPL_MC_ETX Estimated number of transmissions (ETX)
CONFIG_NET_RPL_MC_NONE No routing metric
CONFIG_NET_RPL_MIN_HOP_RANK_INC Minimum hop rank increment
CONFIG_NET_RPL_MOP2 Storing Mode of Operation with no multicast support
CONFIG_NET_RPL_MOP3 Storing Mode of Operation with multicast support
CONFIG_NET_RPL_MRHOF Minimum Rank with Hysteresis, RFC 6719
CONFIG_NET_RPL_OF0 OF Zero, RFC 6552
CONFIG_NET_RPL_PREFERENCE DAG preference field default value
CONFIG_NET_RPL_PREFIX Network IPv6 prefix
CONFIG_NET_RPL_PROBING Enable RPL probing
CONFIG_NET_RX_STACK_RPL RPL specific RX stack need
CONFIG_NET_RX_STACK_SIZE RX thread stack size
CONFIG_NET_SHELL Enable network shell utilities
CONFIG_NET_SLIP_TAP TAP SLIP driver
CONFIG_NET_SOCKETS BSD Sockets compatible API
CONFIG_NET_SOCKETS_DTLS_TIMEOUT Timeout value in milliseconds for DTLS connection
CONFIG_NET_SOCKETS_ENABLE_DTLS Enable DTLS socket support [EXPERIMENTAL]
CONFIG_NET_SOCKETS_POLL_MAX Max number of supported poll() entries
CONFIG_NET_SOCKETS_POSIX_NAMES Standard POSIX names for Sockets API
CONFIG_NET_SOCKETS_SOCKOPT_TLS Enable TCP TLS socket option support [EXPERIMENTAL]
CONFIG_NET_SOCKETS_TLS_MAX_CIPHERSUITES Maximum number of TLS/DTLS ciphersuites per socket
CONFIG_NET_SOCKETS_TLS_MAX_CONTEXTS Maximum number of TLS/DTLS contexts
CONFIG_NET_SOCKETS_TLS_MAX_CREDENTIALS Maximum number of TLS/DTLS credentials per socket
CONFIG_NET_STATISTICS Network statistics
CONFIG_NET_STATISTICS_ETHERNET Ethernet statistics
CONFIG_NET_STATISTICS_ETHERNET_VENDOR Vendor specific Ethernet statistics
CONFIG_NET_STATISTICS_ICMP ICMP statistics
CONFIG_NET_STATISTICS_IPV4 IPv4 statistics
CONFIG_NET_STATISTICS_IPV6 IPv6 statistics
CONFIG_NET_STATISTICS_IPV6_ND IPv6 statistics
CONFIG_NET_STATISTICS_MLD Multicast Listener Discovery (MLD) statistics
CONFIG_NET_STATISTICS_PERIODIC_OUTPUT Simple periodic output
CONFIG_NET_STATISTICS_PER_INTERFACE Collect statistics per network interface
CONFIG_NET_STATISTICS_RPL Collect RPL statistics / RPL statistics
CONFIG_NET_STATISTICS_TCP TCP statistics
CONFIG_NET_STATISTICS_UDP UDP statistics
CONFIG_NET_STATISTICS_USER_API Expose statistics through NET MGMT API
CONFIG_NET_TCP Enable TCP
CONFIG_NET_TCP_ACK_TIMEOUT How long to wait for ACK (in milliseconds)
CONFIG_NET_TCP_BACKLOG_SIZE Number of simultaneous incoming TCP connections
CONFIG_NET_TCP_CHECKSUM Check TCP checksum
CONFIG_NET_TCP_INIT_RETRANSMISSION_TIMEOUT Initial value of Retransmission Timeout (RTO) (in milliseconds)
CONFIG_NET_TCP_RETRY_COUNT Maximum number of TCP segment retransmissions
CONFIG_NET_TCP_TIME_WAIT_DELAY How long to wait in TIME_WAIT state (in milliseconds)
CONFIG_NET_TC_MAPPING_SR_CLASS_A_AND_B SR class A and class B mapping
CONFIG_NET_TC_MAPPING_SR_CLASS_B_ONLY SR class B only mapping
CONFIG_NET_TC_MAPPING_STRICT Strict priority mapping
CONFIG_NET_TC_RX_COUNT How many Rx traffic classes to have for each network device
CONFIG_NET_TC_TX_COUNT How many Tx traffic classes to have for each network device
CONFIG_NET_TEST Network Testing
CONFIG_NET_TRICKLE Enable Trickle library
CONFIG_NET_TX_DEFAULT_PRIORITY Default network packet priority if none have been set
CONFIG_NET_TX_STACK_SIZE TX thread stack size
CONFIG_NET_UDP Enable UDP
CONFIG_NET_UDP_CHECKSUM Check UDP checksum
CONFIG_NET_VLAN Enable virtual lan support
CONFIG_NET_VLAN_COUNT Max VLAN tags supported in the system
CONFIG_NEWLIB_LIBC Build with newlib c library
CONFIG_NEWLIB_LIBC_ALIGNED_HEAP_SIZE Newlib aligned heap size
CONFIG_NEWLIB_LIBC_FLOAT_PRINTF Build with newlib float printf
CONFIG_NEWLIB_LIBC_FLOAT_SCANF Build with newlib float scanf
CONFIG_NFCT_PINS_AS_GPIOS NFCT pins as GPIOs
CONFIG_NFFS_FILESYSTEM_MAX_AREAS Maximum number of areas
CONFIG_NFFS_FILESYSTEM_MAX_BLOCK_SIZE Maximum block size
CONFIG_NIOS2 Nios II Gen 2 architecture
CONFIG_NO_OPTIMIZATIONS Optimize nothing
CONFIG_NRFX_PWM  
CONFIG_NRFX_SPI  
CONFIG_NRFX_SPIM  
CONFIG_NRFX_SPIS  
CONFIG_NRFX_TWI  
CONFIG_NRFX_TWIM  
CONFIG_NRFX_WDT  
CONFIG_NRF_ENABLE_ICACHE Enable the instruction cache (I-Cache)
CONFIG_NRF_RTC_TIMER nRF Real Time Counter (NRF_RTC1) Timer
CONFIG_NRF_UARTE_PERIPHERAL  
CONFIG_NRF_UART_PERIPHERAL  
CONFIG_NUM_2ND_LEVEL_AGGREGATORS Total Number of Second level Interrupt Aggregators
CONFIG_NUM_3RD_LEVEL_AGGREGATORS Total Number of Third level Interrupt Aggregators
CONFIG_NUM_COOP_PRIORITIES Number of coop priorities
CONFIG_NUM_IRQS Upper limit of interrupt numbers/IDs used
CONFIG_NUM_IRQ_PRIO_LEVELS Number of supported interrupt priority levels
CONFIG_NUM_MBOX_ASYNC_MSGS Maximum number of in-flight asynchronous mailbox messages
CONFIG_NUM_METAIRQ_PRIORITIES Number of very-high priority ‘preemptor’ threads
CONFIG_NUM_PIPE_ASYNC_MSGS Maximum number of in-flight asynchronous pipe messages
CONFIG_NUM_PREEMPT_PRIORITIES Number of preemptible priorities
CONFIG_NVS Non-volatile Storage
CONFIG_NVS_LOG Non-volatile Storage logging
CONFIG_NVS_LOG_LEVEL Non-volatile Storage Logging level
CONFIG_NVS_PROTECT_FLASH Non-volatile Storage extra flash protection
CONFIG_NXP_MPU NXP MPU Support
CONFIG_OBJECT_TRACING Kernel object tracing
CONFIG_OFFLOAD_WORKQUEUE_PRIORITY Offload requests workqueue priority
CONFIG_OFFLOAD_WORKQUEUE_STACK_SIZE Workqueue stack size for thread offload requests
CONFIG_OMIT_FRAME_POINTER Omit frame pointer
CONFIG_OPENAMP OpenAMP Support
CONFIG_OPENAMP_SRC_PATH OpenAMP library source path
CONFIG_OPENOCD_SUPPORT OpenOCD support [EXPERIMENTAL]
CONFIG_OPENTHREAD_CHANNEL Default Channel
CONFIG_OPENTHREAD_COMMISSIONER Commissioner functions support
CONFIG_OPENTHREAD_DEBUG OpenThread stack log support
CONFIG_OPENTHREAD_DIAG Diagnostic functions support
CONFIG_OPENTHREAD_FTD FTD - Full Thread Device
CONFIG_OPENTHREAD_JAM_DETECTION Jam detection support
CONFIG_OPENTHREAD_JOINER Joiner functions support
CONFIG_OPENTHREAD_L2_DEBUG OpenThread L2 log support
CONFIG_OPENTHREAD_L2_DEBUG_DUMP_15_4 Dump 802.15.4 packets
CONFIG_OPENTHREAD_L2_DEBUG_DUMP_IPV6 Dump IPv6 packets
CONFIG_OPENTHREAD_L2_LOG_LEVEL  
CONFIG_OPENTHREAD_L2_LOG_LEVEL_DEBUG Debug
CONFIG_OPENTHREAD_L2_LOG_LEVEL_ERROR Error
CONFIG_OPENTHREAD_L2_LOG_LEVEL_INFO Info
CONFIG_OPENTHREAD_L2_LOG_LEVEL_WARNING Warning
CONFIG_OPENTHREAD_LOG_LEVEL  
CONFIG_OPENTHREAD_LOG_LEVEL_DEBUG Debug
CONFIG_OPENTHREAD_LOG_LEVEL_ERROR Error
CONFIG_OPENTHREAD_LOG_LEVEL_INFO Info
CONFIG_OPENTHREAD_LOG_LEVEL_WARNING Warning
CONFIG_OPENTHREAD_MTD MTD - Minimal Thread Device
CONFIG_OPENTHREAD_NETWORK_NAME Default network name
CONFIG_OPENTHREAD_PANID Default PAN ID
CONFIG_OPENTHREAD_PKT_LIST_SIZE List size for Ip6 packet buffering
CONFIG_OPENTHREAD_PLAT  
CONFIG_OPENTHREAD_SHELL Enable OpenThread shell
CONFIG_OPENTHREAD_THREAD_PRIORITY OpenThread thread priority
CONFIG_OPENTHREAD_THREAD_STACK_SIZE OpenThread thread stack size
CONFIG_OPENTHREAD_XPANID Default Extended PAN ID
CONFIG_OSC_EXTERNAL External reference clock
CONFIG_OSC_HIGH_GAIN High gain oscillator
CONFIG_OSC_LOW_POWER Low power oscillator
CONFIG_OSC_XTAL0_FREQ External oscillator frequency
CONFIG_OS_MGMT_RESET_MS Delay before executing reset command (ms)
CONFIG_OT_PLAT_FLASH_PAGES_COUNT Flash pages count used by OpenThread platform
CONFIG_OUTPUT_DISASSEMBLY Create a disassembly file
CONFIG_OUTPUT_PRINT_MEMORY_USAGE Print memory usage to stdout
CONFIG_OUTPUT_STAT Create a statistics file
CONFIG_OVERRIDE_FRAME_POINTER_DEFAULT Override compiler defaults for -fomit-frame-pointer
CONFIG_PCA9633 PCA9633 LED driver
CONFIG_PCA9633_DEV_NAME PCA9633 device name
CONFIG_PCA9633_I2C_ADDRESS PCA9633 I2C slave address
CONFIG_PCA9633_I2C_MASTER_DEV_NAME I2C master where PCA9633 is connected
CONFIG_PCI PCI Settings
CONFIG_PCI_DEBUG Enable PCI debugging
CONFIG_PCI_ENUMERATION Enable PCI device enumeration
CONFIG_PCI_LEGACY_BRIDGE PCI legacy bridge device support
CONFIG_PCI_LEGACY_BRIDGE_BUS PCI Legacy Bridge Bus number
CONFIG_PCI_LEGACY_BRIDGE_DEV PCI Legacy Bridge Device number
CONFIG_PCI_LEGACY_BRIDGE_DEVICE_ID PCI Legacy Bridge Device ID
CONFIG_PCI_LEGACY_BRIDGE_VENDOR_ID PCI Legacy Bridge Vendor ID
CONFIG_PERFORMANCE_METRICS Enable performance metrics [EXPERIMENTAL]
CONFIG_PIC_DISABLE Disable PIC
CONFIG_PINMUX Enable board pinmux driver
CONFIG_PINMUX_BEETLE ARM V2M Beetle Pin multiplexer driver
CONFIG_PINMUX_CC2650 Pinmux driver for CC2650 SoC
CONFIG_PINMUX_DEV Configure pinmux for early board testing
CONFIG_PINMUX_DEV_ARM_V2M_BEETLE Enable pinmux dev driver for ARM V2M Beetle boards
CONFIG_PINMUX_DEV_ATMEL_SAM3X Enable pinmux dev driver for Atmel SAM3X boards
CONFIG_PINMUX_DEV_NAME Configure pinmux for early board testing
CONFIG_PINMUX_DEV_STM32 Enable pinmux dev driver for the ST STM32 family.
CONFIG_PINMUX_ESP32 ESP32 Pin multiplexer driver
CONFIG_PINMUX_FE310 SiFive Freedom E310 SOC pinmux driver
CONFIG_PINMUX_FE310_0_NAME FE310 pinmux 0 driver name
CONFIG_PINMUX_GALILEO_EXP0_NAME Name of the GPIO expander 0
CONFIG_PINMUX_GALILEO_EXP1_NAME Name of the GPIO expander 1
CONFIG_PINMUX_GALILEO_EXP2_NAME Name of the GPIO expander 2
CONFIG_PINMUX_GALILEO_GPIO_DW_NAME Name of the DesignWare GPIO
CONFIG_PINMUX_GALILEO_GPIO_INTEL_CW_NAME Name of the Legacy Bridge Core Well GPIO
CONFIG_PINMUX_GALILEO_GPIO_INTEL_RW_NAME Name of the Legacy Bridge Resume Well GPIO
CONFIG_PINMUX_GALILEO_PWM0_NAME Name of the PWM LED expander 0
CONFIG_PINMUX_INIT_PRIORITY Init priority
CONFIG_PINMUX_MCUX MCUX pinmux driver
CONFIG_PINMUX_MCUX_LPC MCUX LPC pinmux driver
CONFIG_PINMUX_MCUX_LPC_PORT0 Port 0
CONFIG_PINMUX_MCUX_LPC_PORT0_NAME Pinmux Port 0 driver name
CONFIG_PINMUX_MCUX_LPC_PORT1 Port 1
CONFIG_PINMUX_MCUX_LPC_PORT1_NAME Pinmux Port 1 driver name
CONFIG_PINMUX_MCUX_PORTA Port A
CONFIG_PINMUX_MCUX_PORTA_NAME Pinmux Port A driver name
CONFIG_PINMUX_MCUX_PORTB Port B
CONFIG_PINMUX_MCUX_PORTB_NAME Pinmux Port B driver name
CONFIG_PINMUX_MCUX_PORTC Port C
CONFIG_PINMUX_MCUX_PORTC_NAME Pinmux Port C driver name
CONFIG_PINMUX_MCUX_PORTD Port D
CONFIG_PINMUX_MCUX_PORTD_NAME Pinmux Port D driver name
CONFIG_PINMUX_MCUX_PORTE Port E
CONFIG_PINMUX_MCUX_PORTE_NAME Pinmux Port E driver name
CONFIG_PINMUX_MPS2  
CONFIG_PINMUX_NAME Pinmux driver name
CONFIG_PINMUX_QMSI Enable QMSI pinmux dev driver
CONFIG_PINMUX_SAM0 Atmel SAM0 pin multiplexer driver
CONFIG_PINMUX_STM32 Pinmux driver for STM32 MCUs
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY Device initialization priority STM32 pinmux
CONFIG_PLATFORM_SPECIFIC_INIT Enable platform (SOC) specific startup hook
CONFIG_PLIC Platform Level Interrupt Controller (PLIC)
CONFIG_PMS7003 PMS7003 particulate matter sensor
CONFIG_PMS7003_DRIVER_NAME Driver name
CONFIG_PMS7003_UART_DEVICE UART device
CONFIG_POLL Async I/O Framework / Async I/O Framework
CONFIG_POSIX_FS Enable POSIX file system API support
CONFIG_POSIX_MAX_OPEN_FILES Maximum number of open file descriptors
CONFIG_POSIX_MQUEUE Enable POSIX message queue
CONFIG_PREEMPT_ENABLED  
CONFIG_PRESERVE_JTAG_IO_PINS Kinetis K6x JTAG pin usage
CONFIG_PRINTK Send printk() to console
CONFIG_PRINTK_BUFFER_SIZE printk() buffer size
CONFIG_PRIORITY_CEILING Priority inheritance ceiling
CONFIG_PRIVILEGED_STACK_SIZE Size of privileged stack
CONFIG_PTHREAD_IPC POSIX pthread IPC API
CONFIG_PTP_CLOCK Precision Time Protocol Clock driver support
CONFIG_PTP_CLOCK_MCUX MCUX PTP clock driver support
CONFIG_PTP_CLOCK_SAM_GMAC SAM GMAC PTP clock driver support
CONFIG_PULPINO_TIMER pulpino Timer
CONFIG_PWM PWM (Pulse Width Modulation) Drivers
CONFIG_PWM_0 Enable PWM port 0
CONFIG_PWM_0_NAME PWM module 0 device name
CONFIG_PWM_0_NRF_CH0_INVERTED CH0 inverted
CONFIG_PWM_0_NRF_CH0_PIN CH0 pin number
CONFIG_PWM_0_NRF_CH1_INVERTED CH1 inverted
CONFIG_PWM_0_NRF_CH1_PIN CH1 pin number
CONFIG_PWM_0_NRF_CH2_INVERTED CH2 inverted
CONFIG_PWM_0_NRF_CH2_PIN CH2 pin number
CONFIG_PWM_0_NRF_CH3_INVERTED CH3 Inverted
CONFIG_PWM_0_NRF_CH3_PIN CH3 pin number
CONFIG_PWM_0_NRF_CLOCK_PRESCALER Clock prescaler
CONFIG_PWM_1 Enable PWM port 1
CONFIG_PWM_1_NAME PWM module 1 device name
CONFIG_PWM_1_NRF_CH0_INVERTED CH0 inverted
CONFIG_PWM_1_NRF_CH0_PIN CH0 pin number
CONFIG_PWM_1_NRF_CH1_INVERTED CH1 inverted
CONFIG_PWM_1_NRF_CH1_PIN CH1 pin number
CONFIG_PWM_1_NRF_CH2_INVERTED CH2 inverted
CONFIG_PWM_1_NRF_CH2_PIN CH2 pin number
CONFIG_PWM_1_NRF_CH3_INVERTED CH3 Inverted
CONFIG_PWM_1_NRF_CH3_PIN CH3 pin number
CONFIG_PWM_1_NRF_CLOCK_PRESCALER Clock prescaler
CONFIG_PWM_2 Enable PWM port 2
CONFIG_PWM_2_NAME PWM module 2 device name
CONFIG_PWM_2_NRF_CH0_INVERTED CH0 inverted
CONFIG_PWM_2_NRF_CH0_PIN CH0 pin number
CONFIG_PWM_2_NRF_CH1_INVERTED CH1 inverted
CONFIG_PWM_2_NRF_CH1_PIN CH1 pin number
CONFIG_PWM_2_NRF_CH2_INVERTED CH2 inverted
CONFIG_PWM_2_NRF_CH2_PIN CH2 pin number
CONFIG_PWM_2_NRF_CH3_INVERTED CH3 Inverted
CONFIG_PWM_2_NRF_CH3_PIN CH3 pin number
CONFIG_PWM_2_NRF_CLOCK_PRESCALER Clock prescaler
CONFIG_PWM_3 Enable PWM port 3
CONFIG_PWM_3_NAME PWM module 3 device name
CONFIG_PWM_3_NRF_CH0_INVERTED CH0 inverted
CONFIG_PWM_3_NRF_CH0_PIN CH0 pin number
CONFIG_PWM_3_NRF_CH1_INVERTED CH1 inverted
CONFIG_PWM_3_NRF_CH1_PIN CH1 pin number
CONFIG_PWM_3_NRF_CH2_INVERTED CH2 inverted
CONFIG_PWM_3_NRF_CH2_PIN CH2 pin number
CONFIG_PWM_3_NRF_CH3_INVERTED CH3 Inverted
CONFIG_PWM_3_NRF_CH3_PIN CH3 pin number
CONFIG_PWM_3_NRF_CLOCK_PRESCALER Clock prescaler
CONFIG_PWM_4 Enable PWM port 4
CONFIG_PWM_DW DesignWare PWM
CONFIG_PWM_DW_0_DRV_NAME DesignWare PWM Device Name
CONFIG_PWM_IMX i.MX PWM Driver
CONFIG_PWM_LED_ESP32 ESP32 PWM LED driver
CONFIG_PWM_LED_ESP32_DEV_NAME_0 ESP32 PWM LED Name
CONFIG_PWM_LED_ESP32_HS_CH Set high speed channels
CONFIG_PWM_LED_ESP32_HS_CH0 Enable channel 0
CONFIG_PWM_LED_ESP32_HS_CH0_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH0_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH1 Enable channel 1
CONFIG_PWM_LED_ESP32_HS_CH1_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH1_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH2 Enable channel 2
CONFIG_PWM_LED_ESP32_HS_CH2_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH2_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH3 Enable channel 3
CONFIG_PWM_LED_ESP32_HS_CH3_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH3_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH4 Enable channel 4
CONFIG_PWM_LED_ESP32_HS_CH4_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH4_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH5 Enable channel 5
CONFIG_PWM_LED_ESP32_HS_CH5_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH5_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH6 Enable channel 6
CONFIG_PWM_LED_ESP32_HS_CH6_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH6_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_CH7 Enable channel 7
CONFIG_PWM_LED_ESP32_HS_CH7_GPIO GPIO number
CONFIG_PWM_LED_ESP32_HS_CH7_TIMER Set timer
CONFIG_PWM_LED_ESP32_HS_TIMER Set high speed timers
CONFIG_PWM_LED_ESP32_HS_TIMER0 Set timer 0
CONFIG_PWM_LED_ESP32_HS_TIMER0_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_HS_TIMER0_FREQ Set frequency
CONFIG_PWM_LED_ESP32_HS_TIMER1 Set timer 1
CONFIG_PWM_LED_ESP32_HS_TIMER1_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_HS_TIMER1_FREQ Set frequency
CONFIG_PWM_LED_ESP32_HS_TIMER2 Set timer 2
CONFIG_PWM_LED_ESP32_HS_TIMER2_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_HS_TIMER2_FREQ Set frequency
CONFIG_PWM_LED_ESP32_HS_TIMER3 Set timer 3
CONFIG_PWM_LED_ESP32_HS_TIMER3_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_HS_TIMER3_FREQ Set frequency
CONFIG_PWM_LED_ESP32_LS_CH Set low speed channels
CONFIG_PWM_LED_ESP32_LS_CH0 Enable channel 0
CONFIG_PWM_LED_ESP32_LS_CH0_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH0_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH1 Enable channel 1
CONFIG_PWM_LED_ESP32_LS_CH1_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH1_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH2 Enable channel 2
CONFIG_PWM_LED_ESP32_LS_CH2_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH2_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH3 Enable channel 3
CONFIG_PWM_LED_ESP32_LS_CH3_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH3_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH4 Enable channel 4
CONFIG_PWM_LED_ESP32_LS_CH4_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH4_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH5 Enable channel 5
CONFIG_PWM_LED_ESP32_LS_CH5_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH5_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH6 Enable channel 6
CONFIG_PWM_LED_ESP32_LS_CH6_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH6_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_CH7 Enable channel 7
CONFIG_PWM_LED_ESP32_LS_CH7_GPIO GPIO number
CONFIG_PWM_LED_ESP32_LS_CH7_TIMER Set timer
CONFIG_PWM_LED_ESP32_LS_TIMER Set low speed timers
CONFIG_PWM_LED_ESP32_LS_TIMER0 Set timer 0
CONFIG_PWM_LED_ESP32_LS_TIMER0_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_LS_TIMER0_FREQ Set frequency
CONFIG_PWM_LED_ESP32_LS_TIMER1 Set timer 1
CONFIG_PWM_LED_ESP32_LS_TIMER1_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_LS_TIMER1_FREQ Set frequency
CONFIG_PWM_LED_ESP32_LS_TIMER2 Set timer 2
CONFIG_PWM_LED_ESP32_LS_TIMER2_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_LS_TIMER2_FREQ Set frequency
CONFIG_PWM_LED_ESP32_LS_TIMER3 Set timer 3
CONFIG_PWM_LED_ESP32_LS_TIMER3_BIT_NUM Timer counter precision
CONFIG_PWM_LED_ESP32_LS_TIMER3_FREQ Set frequency
CONFIG_PWM_MCUX_FTM MCUX FTM PWM driver
CONFIG_PWM_NRF5_SW Nordic Semiconductor nRF5x series S/W PWM
CONFIG_PWM_NRF5_SW_0_CLOCK_PRESCALER Nordic Semiconductor nRF5x series S/W PWM Clock Prescaler
CONFIG_PWM_NRF5_SW_0_DEV_NAME Nordic Semiconductor nRF5x series S/W PWM Device Name
CONFIG_PWM_NRFX nRF PWM nrfx driver
CONFIG_PWM_PCA9685 PCA9685 I2C-based PWM chip
CONFIG_PWM_PCA9685_0 PCA9685 PWM chip #0
CONFIG_PWM_PCA9685_0_DEV_NAME PCA9685 PWM chip #0 Device Name
CONFIG_PWM_PCA9685_0_I2C_ADDR PCA9685 PWM chip #0 I2C slave address
CONFIG_PWM_PCA9685_0_I2C_MASTER_DEV_NAME I2C Master where PCA9685 PWM chip #0 is connected
CONFIG_PWM_PCA9685_INIT_PRIORITY Init priority
CONFIG_PWM_PWMSWR_LOOP Loop count for PWM Software Reset
CONFIG_PWM_QMSI QMSI PWM Driver
CONFIG_PWM_QMSI_API_REENTRANCY PWM shim driver API reentrancy
CONFIG_PWM_QMSI_DEV_NAME QMSI PWM Device Name
CONFIG_PWM_QMSI_NUM_PORTS Number of PWM ports for PWM
CONFIG_PWM_STM32 STM32 MCU PWM driver
CONFIG_PWM_STM32_1 STM32 PWM 1 Output
CONFIG_PWM_STM32_10 STM32 PWM 10 Output
CONFIG_PWM_STM32_11 STM32 PWM 11 Output
CONFIG_PWM_STM32_12 STM32 PWM 12 Output
CONFIG_PWM_STM32_13 STM32 PWM 13 Output
CONFIG_PWM_STM32_14 STM32 PWM 14 Output
CONFIG_PWM_STM32_15 STM32 PWM 15 Output
CONFIG_PWM_STM32_16 STM32 PWM 16 Output
CONFIG_PWM_STM32_17 STM32 PWM 17 Output
CONFIG_PWM_STM32_18 STM32 PWM 18 Output
CONFIG_PWM_STM32_19 STM32 PWM 19 Output
CONFIG_PWM_STM32_2 STM32 PWM 2 Output
CONFIG_PWM_STM32_20 STM32 PWM 20 Output
CONFIG_PWM_STM32_3 STM32 PWM 3 Output
CONFIG_PWM_STM32_4 STM32 PWM 4 Output
CONFIG_PWM_STM32_5 STM32 PWM 5 Output
CONFIG_PWM_STM32_6 STM32 PWM 6 Output
CONFIG_PWM_STM32_7 STM32 PWM 7 Output
CONFIG_PWM_STM32_8 STM32 PWM 8 Output
CONFIG_PWM_STM32_9 STM32 PWM 9 Output
CONFIG_QEMU_TARGET  
CONFIG_QMSI QMSI driver support
CONFIG_QMSI_BUILTIN Enable QMSI drivers through integrated sources
CONFIG_QMSI_INSTALL_PATH QMSI install path
CONFIG_QMSI_LIBRARY Enable QMSI drivers using external library
CONFIG_QUARK_SE_IPM_CONSOLE_RING_BUF_SIZE32 IPM Console Ring Buffer Size
CONFIG_QUARK_SE_IPM_IRQ_PRI IPM interrupt priority
CONFIG_QUARK_SE_SS_IPM_IRQ_PRI IPM interrupt priority
CONFIG_RAM_CONSOLE Use RAM console
CONFIG_RAM_CONSOLE_BUFFER_SIZE Ram Console buffer size
CONFIG_REALMODE boot from x86 real mode
CONFIG_REBOOT Reboot functionality
CONFIG_REBOOT_RST_CNT Reboot via RST_CNT register
CONFIG_RETPOLINE Build with retpolines enabled
CONFIG_RGF_NUM_BANKS Number of General Purpose Register Banks
CONFIG_RING_BUFFER Enable ring buffers
CONFIG_RISCV32 RISCV32 architecture
CONFIG_RISCV_GENERIC_TOOLCHAIN Compile using generic riscv32 toolchain
CONFIG_RISCV_HAS_CPU_IDLE Does SOC has CPU IDLE instruction
CONFIG_RISCV_HAS_PLIC Does the SOC provide support for a Platform Level Interrupt Controller
CONFIG_RISCV_MACHINE_TIMER RISCV Machine Timer
CONFIG_RISCV_RAM_BASE_ADDR  
CONFIG_RISCV_RAM_SIZE  
CONFIG_RISCV_RAM_SIZE_MB  
CONFIG_RISCV_ROM_BASE_ADDR  
CONFIG_RISCV_ROM_SIZE  
CONFIG_RISCV_SOC_CONTEXT_SAVE Enable SOC-based context saving in IRQ handler
CONFIG_RISCV_SOC_INTERRUPT_INIT Enable SOC-based interrupt initialization
CONFIG_RNDIS_BULK_EP_MPS  
CONFIG_RNDIS_INTERRUPT_EP_MPS  
CONFIG_RTC Real-Time Clock
CONFIG_RTC_0_IRQ_PRI  
CONFIG_RTC_0_NAME Driver instance name
CONFIG_RTC_MCUX MCUX RTC driver
CONFIG_RTC_PRESCALER Prescaler size
CONFIG_RTC_QMSI QMSI RTC Driver
CONFIG_RTC_QMSI_API_REENTRANCY RTC shim driver API reentrancy
CONFIG_RTT_CONSOLE Use RTT console
CONFIG_RTT_TX_RETRY_CNT Number of TX retries
CONFIG_RTT_TX_RETRY_DELAY_MS Delay between TX retries in milliseconds
CONFIG_RTT_TX_RETRY_IN_INTERRUPT Busy wait in the interrupt context for TX retry
CONFIG_RUNTIME_NMI Attach an NMI handler at runtime
CONFIG_SCHED_DEADLINE Enable earliest-deadline-first scheduling
CONFIG_SCHED_DUMB Simple linked-list ready queue
CONFIG_SCHED_MULTIQ Traditional multi-queue ready queue
CONFIG_SCHED_SCALABLE Red/black tree ready queue
CONFIG_SEGGER_RTT_BUFFER_SIZE_DOWN Size of the buffer for terminal input of target, from host
CONFIG_SEGGER_RTT_BUFFER_SIZE_UP Size of the buffer for terminal output of target, up to host
CONFIG_SEGGER_RTT_MAX_NUM_DOWN_BUFFERS Maximum number of down-buffers
CONFIG_SEGGER_RTT_MAX_NUM_UP_BUFFERS Maximum number of up-buffers
CONFIG_SEGGER_RTT_MEMCPY_USE_BYTELOOP Use a simple byte-loop instead of standard memcpy
CONFIG_SEGGER_RTT_MODE  
CONFIG_SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL Block: Wait until there is space in the buffer.
CONFIG_SEGGER_RTT_MODE_NO_BLOCK_SKIP Skip. Do not block, output nothing.
CONFIG_SEGGER_RTT_MODE_NO_BLOCK_TRIM Trim: Do not block, output as much as fits.
CONFIG_SEGGER_RTT_PRINTF_BUFFER_SIZE Size of buffer for RTT printf to bulk-send chars via RTT
CONFIG_SEGGER_SYSTEMVIEW Segger SystemView support
CONFIG_SEM_VALUE_MAX Maximum semaphore limit
CONFIG_SENSOR Sensor Drivers
CONFIG_SENSOR_INIT_PRIORITY Sensor init priority
CONFIG_SERIAL Serial Drivers
CONFIG_SERIAL_HAS_DRIVER  
CONFIG_SERIAL_SUPPORT_INTERRUPT  
CONFIG_SETTINGS Enable settings subsystem with non-volatile storage
CONFIG_SETTINGS_FCB FCB
CONFIG_SETTINGS_FCB_FLASH_AREA Flash area id used for settings
CONFIG_SETTINGS_FCB_MAGIC FCB magic for the settings subsystem
CONFIG_SETTINGS_FCB_NUM_AREAS Number of flash areas used by the settings subsystem
CONFIG_SETTINGS_FS File System
CONFIG_SETTINGS_FS_DIR Serialization directory
CONFIG_SETTINGS_FS_FILE Default settings file
CONFIG_SETTINGS_FS_MAX_LINES Compression threshold
CONFIG_SET_GDT Setup GDT as part of boot process
CONFIG_SHARED_GDT_RAM_ADDR Address of the shared RAM with the QMSI Bootloader / Address of the GDT in RAM shared with the QMSI Bootloader
CONFIG_SHARED_GDT_RAM_SIZE Size of the shared RAM with the QMSI Bootloader / Size of the GDT in RAM shared with the QMSI Bootloader
CONFIG_SHARED_IRQ Shared interrupt driver
CONFIG_SHARED_IRQ_0 Shared interrupt instance 0
CONFIG_SHARED_IRQ_0_FALLING_EDGE Falling Edge
CONFIG_SHARED_IRQ_0_IRQ instance 0 interrupt
CONFIG_SHARED_IRQ_0_LEVEL_HIGH Level High
CONFIG_SHARED_IRQ_0_LEVEL_LOW Level Low
CONFIG_SHARED_IRQ_0_NAME Select a name for the device
CONFIG_SHARED_IRQ_0_PRI instance 0 interrupt priority
CONFIG_SHARED_IRQ_0_RISING_EDGE Rising Edge
CONFIG_SHARED_IRQ_1 Shared interrupt instance 1
CONFIG_SHARED_IRQ_1_FALLING_EDGE Falling Edge
CONFIG_SHARED_IRQ_1_IRQ instance 1 interrupt
CONFIG_SHARED_IRQ_1_LEVEL_HIGH Level High
CONFIG_SHARED_IRQ_1_LEVEL_LOW Level Low
CONFIG_SHARED_IRQ_1_NAME Select a name for the device
CONFIG_SHARED_IRQ_1_PRI instance 1 interrupt priority
CONFIG_SHARED_IRQ_1_RISING_EDGE Rising Edge
CONFIG_SHARED_IRQ_INIT_PRIORITY Shared IRQ init priority
CONFIG_SHARED_IRQ_NUM_CLIENTS The number of clients per instance
CONFIG_SHT3XD SHT3xD Temperature and Humidity Sensor
CONFIG_SHT3XD_GPIO_DEV_NAME GPIO device
CONFIG_SHT3XD_GPIO_PIN_NUM Interrupt GPIO pin number
CONFIG_SHT3XD_I2C_ADDR SHT3XD I2C address
CONFIG_SHT3XD_I2C_MASTER_DEV_NAME I2C master where SHT3xD is connected
CONFIG_SHT3XD_MPS_05 0.5
CONFIG_SHT3XD_MPS_1 1
CONFIG_SHT3XD_MPS_10 10
CONFIG_SHT3XD_MPS_2 2
CONFIG_SHT3XD_MPS_4 4
CONFIG_SHT3XD_NAME Driver name
CONFIG_SHT3XD_REPEATABILITY_HIGH high
CONFIG_SHT3XD_REPEATABILITY_LOW low
CONFIG_SHT3XD_REPEATABILITY_MEDIUM medium
CONFIG_SHT3XD_THREAD_PRIORITY Thread priority
CONFIG_SHT3XD_THREAD_STACK_SIZE Thread stack size
CONFIG_SHT3XD_TRIGGER  
CONFIG_SHT3XD_TRIGGER_GLOBAL_THREAD Use global thread
CONFIG_SHT3XD_TRIGGER_NONE No trigger
CONFIG_SHT3XD_TRIGGER_OWN_THREAD Use own thread
CONFIG_SIMPLELINK_HOST_DRIVER Build the SimpleLink WiFi Host Driver
CONFIG_SIMPLE_FATAL_ERROR_HANDLER Simple system fatal error handler
CONFIG_SIMULATOR_XTENSA Simulator Configuration
CONFIG_SIZE_OPTIMIZATIONS Optimize for size
CONFIG_SLAVE_BOOT_ADDRESS_MCUX Address the slave core will boot at
CONFIG_SLAVE_CORE_MCUX Enable LPC54114 Cortex-M0 slave core
CONFIG_SLAVE_IMAGE_MCUX Binary image of slave core’s code
CONFIG_SLIP SLIP driver
CONFIG_SLIP_DRV_NAME SLIP Driver name
CONFIG_SLIP_MAC_ADDR MAC address for the interface
CONFIG_SLIP_MTU SLIP MTU
CONFIG_SLIP_STATISTICS SLIP network connection statistics
CONFIG_SLIP_TAP Use TAP interface to host
CONFIG_SMP Enable symmetric multithreading support
CONFIG_SNTP SNTP Support
CONFIG_SOC  
CONFIG_SOC_APOLLO_LAKE Intel Apollo Lake Soc
CONFIG_SOC_ATMEL_SAM3X_EXT_MAINCK Atmel SAM3 to use external crystal oscillator for main clock
CONFIG_SOC_ATMEL_SAM3X_EXT_SLCK Atmel SAM3 to use external crystal oscillator for slow clock
CONFIG_SOC_ATMEL_SAM3X_PLLA_DIVA  
CONFIG_SOC_ATMEL_SAM3X_PLLA_MULA  
CONFIG_SOC_ATMEL_SAM3X_WAIT_MODE Atmel SAM3 goes to Wait mode instead of Sleep mode
CONFIG_SOC_ATMEL_SAM4S_EXT_MAINCK Atmel SAM4S to use external crystal oscillator for main clock
CONFIG_SOC_ATMEL_SAM4S_EXT_SLCK Atmel SAM4S to use external crystal oscillator for slow clock
CONFIG_SOC_ATMEL_SAM4S_PLLA_DIVA PLL DIVA
CONFIG_SOC_ATMEL_SAM4S_PLLA_MULA PLL MULA
CONFIG_SOC_ATMEL_SAM4S_WAIT_MODE Atmel SAM4S goes to Wait mode instead of Sleep mode
CONFIG_SOC_ATMEL_SAMD_OSC8M_AS_MAIN OSC8M
CONFIG_SOC_ATMEL_SAMD_XOSC Enable the external crystal oscillator
CONFIG_SOC_ATMEL_SAMD_XOSC32K Enable the external 32 kHz crystal oscillator
CONFIG_SOC_ATMEL_SAMD_XOSC32K_AS_MAIN XOSC32K
CONFIG_SOC_ATMEL_SAMD_XOSC_AS_MAIN XOSC
CONFIG_SOC_ATMEL_SAME70_DISABLE_ERASE_PIN Disable ERASE pin
CONFIG_SOC_ATMEL_SAME70_EXT_MAINCK Use external crystal oscillator for main clock
CONFIG_SOC_ATMEL_SAME70_EXT_SLCK Use external crystal oscillator for slow clock
CONFIG_SOC_ATMEL_SAME70_MDIV MDIV
CONFIG_SOC_ATMEL_SAME70_PLLA_DIVA PLL DIVA
CONFIG_SOC_ATMEL_SAME70_PLLA_MULA PLL MULA
CONFIG_SOC_ATMEL_SAME70_WAIT_MODE Go to Wait mode instead of Sleep mode
CONFIG_SOC_ATOM Intel ATOM SoC
CONFIG_SOC_BEETLE_R0 ARM BEETLE R0
CONFIG_SOC_CC2650 CC2650
CONFIG_SOC_CC3220SF CC3220SF
CONFIG_SOC_DCDC_NRF52X  
CONFIG_SOC_D_108MINI D_108mini core
CONFIG_SOC_D_212GP D_212GP core
CONFIG_SOC_D_233L D_233L core
CONFIG_SOC_EFM32WG SOC_EFM32WG
CONFIG_SOC_EFR32FG1P SOC_EFR32FG1P
CONFIG_SOC_EMSK Synopsys ARC EM Starter Kit SoC
CONFIG_SOC_EMSK_EM11D Synopsys ARC EM11D of EMSK
CONFIG_SOC_EMSK_EM7D Synopsys ARC EM7D of EMSK
CONFIG_SOC_EMSK_EM9D Synopsys ARC EM9D of EMSK
CONFIG_SOC_ESP32 ESP32
CONFIG_SOC_FAMILY  
CONFIG_SOC_FAMILY_ARM  
CONFIG_SOC_FAMILY_EXX32  
CONFIG_SOC_FAMILY_IMX  
CONFIG_SOC_FAMILY_KINETIS  
CONFIG_SOC_FAMILY_LPC  
CONFIG_SOC_FAMILY_NRF  
CONFIG_SOC_FAMILY_QUARK  
CONFIG_SOC_FAMILY_RISCV_PRIVILEGE  
CONFIG_SOC_FAMILY_SAM  
CONFIG_SOC_FAMILY_SAM0  
CONFIG_SOC_FAMILY_STM32  
CONFIG_SOC_FAMILY_TISIMPLELINK  
CONFIG_SOC_FLASH_MCUX MCUX flash shim driver
CONFIG_SOC_FLASH_NIOS2_QSPI Nios-II QSPI flash driver
CONFIG_SOC_FLASH_NIOS2_QSPI_DEV_NAME Nios-II QSPI flash device name
CONFIG_SOC_FLASH_NRF Nordic Semiconductor nRF flash driver
CONFIG_SOC_FLASH_NRF_RADIO_SYNC Nordic nRFx flash driver synchronized with radio
CONFIG_SOC_FLASH_QMSI QMSI flash driver
CONFIG_SOC_FLASH_QMSI_API_REENTRANCY flash driver API reentrancy for QMSI shim driver
CONFIG_SOC_FLASH_QMSI_CLK_COUNT_US System clk count per microsecond
CONFIG_SOC_FLASH_QMSI_DEV_NAME QMSI flash device name
CONFIG_SOC_FLASH_QMSI_SYS_SIZE SOC system flash size
CONFIG_SOC_FLASH_QMSI_WAIT_STATES The number of flash wait states
CONFIG_SOC_FLASH_SAM0 Atmel SAM0 flash driver
CONFIG_SOC_FLASH_SAM0_EMULATE_BYTE_PAGES Emulate byte-sized pages
CONFIG_SOC_FLASH_STM32 STM32 flash driver
CONFIG_SOC_HIFI2_STD hifi2_std core
CONFIG_SOC_HIFI3_BD5 hifi3_bd5 core
CONFIG_SOC_HIFI3_BD5_CALL0 hifi3_bd5_call0 (hifi3_bd5 core with call0 ABI and 3 additional SW IRQs)
CONFIG_SOC_HIFI4_BD7 hifi4_bd7 core
CONFIG_SOC_HIFI_MINI hifi_mini core
CONFIG_SOC_HIFI_MINI_4SWIRQ hifi_mini_4swIrq (hifi_mini core with 4 additional SW IRQs)
CONFIG_SOC_IA32 Generic IA32 SoC
CONFIG_SOC_INTEL_S1000 intel_s1000
CONFIG_SOC_LPC54114_M0 SOC_LPC54114_M0
CONFIG_SOC_LPC54114_M4 SOC_LPC54114_M4
CONFIG_SOC_MCIMX6X_M4 SOC_MCIMX6X_M4
CONFIG_SOC_MCIMX7_M4 SOC_MCIMX7_M4
CONFIG_SOC_MIMXRT1051 SOC_MIMXRT1051
CONFIG_SOC_MIMXRT1052 SOC_MIMXRT1052
CONFIG_SOC_MK64F12 SOC_MK64F12
CONFIG_SOC_MKL25Z4 SOC_MKL25Z4
CONFIG_SOC_MKW22D5 SOC_MKW22D5
CONFIG_SOC_MKW24D5 SOC_MKW24D5
CONFIG_SOC_MKW40Z4 SOC_MKW40Z4
CONFIG_SOC_MKW41Z4 SOC_MKW41Z4
CONFIG_SOC_MPS2_AN385 ARM Cortex-M3 SMM on V2M-MPS2 (Application Note AN385)
CONFIG_SOC_MSP432P401R MSP432P401R
CONFIG_SOC_NIOS2F_ZEPHYR Nios IIf - Zephyr Golden Configuration
CONFIG_SOC_NIOS2_QEMU Nios II - Experimental QEMU emulation
CONFIG_SOC_NRF51822_QFAA NRF51822_QFAA
CONFIG_SOC_NRF51822_QFAB NRF51822_QFAB
CONFIG_SOC_NRF51822_QFAC NRF51822_QFAC
CONFIG_SOC_NRF52810  
CONFIG_SOC_NRF52810_QFAA NRF52810_QFAA
CONFIG_SOC_NRF52832  
CONFIG_SOC_NRF52832_QFAA NRF52832_QFAA
CONFIG_SOC_NRF52840  
CONFIG_SOC_NRF52840_QIAA NRF52840_QIAA
CONFIG_SOC_NSIM Synopsys NSIM simulator for ARC EM
CONFIG_SOC_NSIM_EM Synopsys ARC EM of nsim
CONFIG_SOC_NSIM_SEM Synopsys ARC SEM of nsim
CONFIG_SOC_PART_NUMBER  
CONFIG_SOC_PART_NUMBER_EFM32WG990F256  
CONFIG_SOC_PART_NUMBER_EFR32FG1P133F256GM48  
CONFIG_SOC_PART_NUMBER_EXX32_EFM32WG  
CONFIG_SOC_PART_NUMBER_EXX32_EFR32FG1P  
CONFIG_SOC_PART_NUMBER_IMX7_M4  
CONFIG_SOC_PART_NUMBER_IMX_6X_M4  
CONFIG_SOC_PART_NUMBER_IMX_RT  
CONFIG_SOC_PART_NUMBER_KINETIS_K6X  
CONFIG_SOC_PART_NUMBER_KINETIS_KL2X  
CONFIG_SOC_PART_NUMBER_KINETIS_KWX  
CONFIG_SOC_PART_NUMBER_LPC54114J256BD64  
CONFIG_SOC_PART_NUMBER_LPC54XXX  
CONFIG_SOC_PART_NUMBER_MCIMX6X1EVK10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X1EVK10AC  
CONFIG_SOC_PART_NUMBER_MCIMX6X1EVO10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X1EVO10AC  
CONFIG_SOC_PART_NUMBER_MCIMX6X2EVN10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X2EVN10AC  
CONFIG_SOC_PART_NUMBER_MCIMX6X3EVK10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X3EVK10AC  
CONFIG_SOC_PART_NUMBER_MCIMX6X3EVN10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X3EVN10AC  
CONFIG_SOC_PART_NUMBER_MCIMX6X3EVO10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X3EVO10AC  
CONFIG_SOC_PART_NUMBER_MCIMX6X4EVM10AB  
CONFIG_SOC_PART_NUMBER_MCIMX6X4EVM10AC  
CONFIG_SOC_PART_NUMBER_MCIMX7D5EVM10SC  
CONFIG_SOC_PART_NUMBER_MIMXRT1051CVL5A  
CONFIG_SOC_PART_NUMBER_MIMXRT1051DVL6A  
CONFIG_SOC_PART_NUMBER_MIMXRT1052CVL5A  
CONFIG_SOC_PART_NUMBER_MIMXRT1052DVL6A  
CONFIG_SOC_PART_NUMBER_MK64FN1M0CAJ12  
CONFIG_SOC_PART_NUMBER_MK64FN1M0VDC12  
CONFIG_SOC_PART_NUMBER_MK64FN1M0VLL12  
CONFIG_SOC_PART_NUMBER_MK64FN1M0VLQ12  
CONFIG_SOC_PART_NUMBER_MK64FN1M0VMD12  
CONFIG_SOC_PART_NUMBER_MK64FX512VDC12  
CONFIG_SOC_PART_NUMBER_MK64FX512VLL12  
CONFIG_SOC_PART_NUMBER_MK64FX512VLQ12  
CONFIG_SOC_PART_NUMBER_MK64FX512VMD12  
CONFIG_SOC_PART_NUMBER_MKL25Z128VFM4  
CONFIG_SOC_PART_NUMBER_MKL25Z128VFT4  
CONFIG_SOC_PART_NUMBER_MKL25Z128VLH4  
CONFIG_SOC_PART_NUMBER_MKL25Z128VLK4  
CONFIG_SOC_PART_NUMBER_MKL25Z32VFM4  
CONFIG_SOC_PART_NUMBER_MKL25Z32VFT4  
CONFIG_SOC_PART_NUMBER_MKL25Z32VLH4  
CONFIG_SOC_PART_NUMBER_MKL25Z32VLK4  
CONFIG_SOC_PART_NUMBER_MKL25Z64VFM4  
CONFIG_SOC_PART_NUMBER_MKL25Z64VFT4  
CONFIG_SOC_PART_NUMBER_MKL25Z64VLH4  
CONFIG_SOC_PART_NUMBER_MKL25Z64VLK4  
CONFIG_SOC_PART_NUMBER_MKW22D512VHA5  
CONFIG_SOC_PART_NUMBER_MKW24D512VHA5  
CONFIG_SOC_PART_NUMBER_MKW40Z160VHT4  
CONFIG_SOC_PART_NUMBER_MKW41Z256VHT4  
CONFIG_SOC_PART_NUMBER_MKW41Z512VHT4  
CONFIG_SOC_PART_NUMBER_SAM3X8E SAM3X8E
CONFIG_SOC_PART_NUMBER_SAM4S16C SAM4S16C
CONFIG_SOC_PART_NUMBER_SAMD20E14 SAMD20E14
CONFIG_SOC_PART_NUMBER_SAMD20E15 SAMD20E15
CONFIG_SOC_PART_NUMBER_SAMD20E16 SAMD20E16
CONFIG_SOC_PART_NUMBER_SAMD20E17 SAMD20E17
CONFIG_SOC_PART_NUMBER_SAMD20E18 SAMD20E18
CONFIG_SOC_PART_NUMBER_SAMD20G14 SAMD20G14
CONFIG_SOC_PART_NUMBER_SAMD20G15 SAMD20G15
CONFIG_SOC_PART_NUMBER_SAMD20G16 SAMD20G16
CONFIG_SOC_PART_NUMBER_SAMD20G17 SAMD20G17
CONFIG_SOC_PART_NUMBER_SAMD20G17U SAMD20G17U
CONFIG_SOC_PART_NUMBER_SAMD20G18 SAMD20G18
CONFIG_SOC_PART_NUMBER_SAMD20G18U SAMD20G18U
CONFIG_SOC_PART_NUMBER_SAMD20J14 SAMD20J14
CONFIG_SOC_PART_NUMBER_SAMD20J15 SAMD20J15
CONFIG_SOC_PART_NUMBER_SAMD20J16 SAMD20J16
CONFIG_SOC_PART_NUMBER_SAMD20J17 SAMD20J17
CONFIG_SOC_PART_NUMBER_SAMD20J18 SAMD20J18
CONFIG_SOC_PART_NUMBER_SAMD21E15A SAMD21E15A
CONFIG_SOC_PART_NUMBER_SAMD21E16A SAMD21E16A
CONFIG_SOC_PART_NUMBER_SAMD21E17A SAMD21E17A
CONFIG_SOC_PART_NUMBER_SAMD21E18A SAMD21E18A
CONFIG_SOC_PART_NUMBER_SAMD21G15A SAMD21G15A
CONFIG_SOC_PART_NUMBER_SAMD21G16A SAMD21G16A
CONFIG_SOC_PART_NUMBER_SAMD21G17A SAMD21G17A
CONFIG_SOC_PART_NUMBER_SAMD21G17AU SAMD21G17AU
CONFIG_SOC_PART_NUMBER_SAMD21G18A SAMD21G18A
CONFIG_SOC_PART_NUMBER_SAMD21G18AU SAMD21G18AU
CONFIG_SOC_PART_NUMBER_SAMD21J15A SAMD21J15A
CONFIG_SOC_PART_NUMBER_SAMD21J16A SAMD21J16A
CONFIG_SOC_PART_NUMBER_SAMD21J17A SAMD21J17A
CONFIG_SOC_PART_NUMBER_SAMD21J18A SAMD21J18A
CONFIG_SOC_PART_NUMBER_SAME70J19 SAME70J19
CONFIG_SOC_PART_NUMBER_SAME70J20 SAME70J20
CONFIG_SOC_PART_NUMBER_SAME70J21 SAME70J21
CONFIG_SOC_PART_NUMBER_SAME70N19 SAME70N19
CONFIG_SOC_PART_NUMBER_SAME70N20 SAME70N20
CONFIG_SOC_PART_NUMBER_SAME70N21 SAME70N21
CONFIG_SOC_PART_NUMBER_SAME70Q19 SAME70Q19
CONFIG_SOC_PART_NUMBER_SAME70Q20 SAME70Q20
CONFIG_SOC_PART_NUMBER_SAME70Q21 SAME70Q21
CONFIG_SOC_POSIX Native POSIX port
CONFIG_SOC_QUARK_D2000 Intel Quark D2000
CONFIG_SOC_QUARK_SE_C1000 Intel Quark SE C1000
CONFIG_SOC_QUARK_SE_C1000_SS Intel Quark SE C1000- Sensor Sub System
CONFIG_SOC_QUARK_SE_CURIE Intel Curie
CONFIG_SOC_QUARK_X1000 Quark X1000
CONFIG_SOC_RISCV32_FE310 SiFive Freedom E310 SOC implementation
CONFIG_SOC_RISCV32_MIV Microsemi Mi-V system implementation
CONFIG_SOC_RISCV32_PULPINO Pulpino SOC implementation
CONFIG_SOC_RISCV32_QEMU riscv32_qemu SOC implementation
CONFIG_SOC_SERIES  
CONFIG_SOC_SERIES_BEETLE ARM Beetle MCU Series
CONFIG_SOC_SERIES_CC2650 TI SimpleLink Family CC2650
CONFIG_SOC_SERIES_CC32XX TI SimpleLink Family
CONFIG_SOC_SERIES_EFM32WG EFM32WG Series MCU
CONFIG_SOC_SERIES_EFR32FG1P EFR32FG1P Series MCU
CONFIG_SOC_SERIES_IMX7_M4 i.MX7 M4 Core Series
CONFIG_SOC_SERIES_IMX_6X_M4 i.MX 6SoloX M4 Core Series
CONFIG_SOC_SERIES_IMX_RT i.MX RT Series
CONFIG_SOC_SERIES_KINETIS_K6X Kinetis K6x Series MCU
CONFIG_SOC_SERIES_KINETIS_KL2X Kinetis KL2x Series MCU
CONFIG_SOC_SERIES_KINETIS_KWX Kinetis KWx Series MCU
CONFIG_SOC_SERIES_LPC54XXX LPC LPC54xxx Series MCU
CONFIG_SOC_SERIES_MPS2 ARM MPS2 MCU Series
CONFIG_SOC_SERIES_MSP432P4XX TI SimpleLink Family MSP432P4XX
CONFIG_SOC_SERIES_NRF51X Nordic Semiconductor nRF51 series MCU
CONFIG_SOC_SERIES_NRF52X Nordic Semiconductor nRF52 series MCU
CONFIG_SOC_SERIES_QUARK_D2000 Quark D2000 Series MCU
CONFIG_SOC_SERIES_QUARK_SE Quark SE Series MCU
CONFIG_SOC_SERIES_QUARK_X1000 Intel Quark X1000 Series
CONFIG_SOC_SERIES_RISCV32_FE310 SiFive Freedom E310 SOC implementation
CONFIG_SOC_SERIES_RISCV32_MIV Microsemi Mi-V implementation
CONFIG_SOC_SERIES_RISCV32_QEMU riscv32 QEMU SOC implementation
CONFIG_SOC_SERIES_SAM3X Atmel SAM3X MCU
CONFIG_SOC_SERIES_SAM4S Atmel SAM4S MCU
CONFIG_SOC_SERIES_SAMD20 Atmel SAMD20 MCU
CONFIG_SOC_SERIES_SAMD21 Atmel SAMD21 MCU
CONFIG_SOC_SERIES_SAME70 Atmel SAME70 MCU
CONFIG_SOC_SERIES_STM32F0X STM32F0x Series MCU
CONFIG_SOC_SERIES_STM32F1X STM32F1x Series MCU
CONFIG_SOC_SERIES_STM32F2X stm32f2x Series MCU
CONFIG_SOC_SERIES_STM32F3X STM32F3x Series MCU
CONFIG_SOC_SERIES_STM32F4X STM32F4x Series MCU
CONFIG_SOC_SERIES_STM32F7X STM32F7x Series MCU
CONFIG_SOC_SERIES_STM32L0X STM32L0x Series MCU
CONFIG_SOC_SERIES_STM32L4X STM32L4x Series MCU
CONFIG_SOC_STM32F030X8 STM32F030X8
CONFIG_SOC_STM32F051X8 STM32F051X8
CONFIG_SOC_STM32F070XB STM32F070XB
CONFIG_SOC_STM32F072XB STM32F072XB
CONFIG_SOC_STM32F091XC STM32F091XC
CONFIG_SOC_STM32F103X8 STM32F103X8
CONFIG_SOC_STM32F103XB STM32F103XB
CONFIG_SOC_STM32F103XE STM32F103XE
CONFIG_SOC_STM32F107XC STM32F107XC
CONFIG_SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE  
CONFIG_SOC_STM32F10X_DENSITY_DEVICE  
CONFIG_SOC_STM32F207XE STM32F207XE
CONFIG_SOC_STM32F207XG STM32F207XG
CONFIG_SOC_STM32F303XC STM32F303XC
CONFIG_SOC_STM32F334X8 STM32F334X8
CONFIG_SOC_STM32F373XC STM32F373XC
CONFIG_SOC_STM32F401XE STM32F401XE
CONFIG_SOC_STM32F405XG STM32F405XG
CONFIG_SOC_STM32F407XG STM32F407XG
CONFIG_SOC_STM32F411XE STM32F411XE
CONFIG_SOC_STM32F412CG STM32F412CG
CONFIG_SOC_STM32F412ZG STM32F412ZG
CONFIG_SOC_STM32F413XH STM32F413XH
CONFIG_SOC_STM32F417XE STM32F417XE
CONFIG_SOC_STM32F417XG STM32F417XG
CONFIG_SOC_STM32F429XI STM32F429XI
CONFIG_SOC_STM32F446XE STM32F446XE
CONFIG_SOC_STM32F469XI STM32F469XI
CONFIG_SOC_STM32F723XE STM32F723XE
CONFIG_SOC_STM32F746XG STM32F746XG
CONFIG_SOC_STM32F769XI STM32F769XI
CONFIG_SOC_STM32L053X8 STM32L053X8
CONFIG_SOC_STM32L072XZ STM32L072XZ
CONFIG_SOC_STM32L073XZ STM32L073XZ
CONFIG_SOC_STM32L432XC STM32L432XC
CONFIG_SOC_STM32L433XC STM32L433XC
CONFIG_SOC_STM32L475XG STM32L475XG
CONFIG_SOC_STM32L476XG STM32L476XG
CONFIG_SOC_STM32L496XG STM32L496XG
CONFIG_SOC_TI_LM3S6965 TI LM3S6965
CONFIG_SOC_TI_LM3S6965_QEMU  
CONFIG_SOC_WATCH Enable SoCWatch drivers and related instrumentation
CONFIG_SOC_XRC_D2PM_5SWIRQ XRC_D2PM_5swIrq (XRC_D2PM core with 4 additional SW IRQs)
CONFIG_SOC_XRC_FUSION_AON_ALL_LM XRC_FUSION_AON_ALL_LM core
CONFIG_SOC_XTENSA_SAMPLE_CONTROLLER Xtensa sample_controller core
CONFIG_SPEED_OPTIMIZATIONS Optimize for speed
CONFIG_SPI SPI hardware bus support
CONFIG_SPI_0 SPI port 0
CONFIG_SPI_0_CS_GPIO_PIN The GPIO PIN which is used to act as a CS pin
CONFIG_SPI_0_CS_GPIO_PORT The GPIO port which is used to control CS
CONFIG_SPI_0_IRQ_PRI Port 0 interrupt priority