CONFIG_RISCV_SOC_CONTEXT_SAVE

Enable SOC-based context saving in IRQ handler

Type: bool

Help

Enable SOC-based context saving, for SOCS which require saving of extra registers when entering an interrupt/exception

Direct dependencies

SOC_RISCV32_PULPINO || RISCV32

(Includes any dependencies from if’s and menus.)

Defaults

• “y” if SOC_RISCV32_PULPINO

Kconfig definitions

At arch/riscv32/soc/pulpino/Kconfig.defconfig:11

Included via Kconfig:10 → Kconfig.zephyr:20

Menu path: (top menu)

config RISCV_SOC_CONTEXT_SAVE
    bool
    default "y" if SOC_RISCV32_PULPINO
    depends on SOC_RISCV32_PULPINO

---

At arch/riscv32/Kconfig:35

Included via Kconfig:10 → Kconfig.zephyr:23 → arch/Kconfig:16

Menu path: (top menu) → RISCV32 Options → RISCV32 Processor Options

config RISCV_SOC_CONTEXT_SAVE
    bool
    prompt "Enable SOC-based context saving in IRQ handler" if RISCV32
    depends on RISCV32
    help
      Enable SOC-based context saving, for SOCS which require saving of
      extra registers when entering an interrupt/exception

(Definitions include propagated dependencies, including from if’s and menus.)