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CONFIG_CLOCK_STM32_PLL_MULTIPLIER
¶
PLL multiplier
PLL multiplier
PLL multiplier
PLL multiplier
Type: int
Help¶
PLL multiplier, allowed values: 2-16. PLL output must not exceed 48MHz.
Help¶
PLL multiplier, PLL output must not exceed 72MHz. Allowed values: Density devices: 2-16 Connectivity devices: 4 - 9 and 13 ( used for multiplication factor 6.5).
Help¶
PLL multiplier, allowed values: 2-16. PLL output must not exceed 72MHz.
Help¶
PLL multiplier, allowed values: 3, 4, 6, 8, 12, 16, 24, 32, 48. PLL output must not exceed 96MHz(1.8V)/48MHz(1.5V)/24MHz(1.2V).
Direct dependencies¶
(CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32F0X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32F1X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32F3X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
) || (CLOCK_STM32_SYSCLK_SRC_PLL
&& SOC_SERIES_STM32L0X
&& CLOCK_CONTROL_STM32_CUBE
&& SOC_FAMILY_STM32
&& CLOCK_CONTROL
)
(Includes any dependencies from if’s and menus.)
Defaults¶
- 6 if
CLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
- 9 if
CLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F1X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
- 9 if
CLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F3X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
- 4 if
CLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32L0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
Kconfig definitions¶
At drivers/clock_control/Kconfig.stm32:140
Included via Kconfig:10
→ Kconfig.zephyr:35
→ drivers/Kconfig:52
→ drivers/clock_control/Kconfig:30
Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_MULTIPLIER int prompt "PLL multiplier" ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
range 2 16 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
default 6 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 2-16. PLL output must not exceed 48MHz.
At drivers/clock_control/Kconfig.stm32:158
Included via Kconfig:10
→ Kconfig.zephyr:35
→ drivers/Kconfig:52
→ drivers/clock_control/Kconfig:30
Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_MULTIPLIER int prompt "PLL multiplier" ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F1X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
range 2 16 ifSOC_STM32F10X_DENSITY_DEVICE
&&CLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F1X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
range 4 9 ifSOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
&&CLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F1X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
default 9 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F1X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F1X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL multiplier, PLL output must not exceed 72MHz. Allowed values: Density devices: 2-16 Connectivity devices: 4 - 9 and 13 ( used for multiplication factor 6.5).
At drivers/clock_control/Kconfig.stm32:247
Included via Kconfig:10
→ Kconfig.zephyr:35
→ drivers/Kconfig:52
→ drivers/clock_control/Kconfig:30
Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_MULTIPLIER int prompt "PLL multiplier" ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F3X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
range 2 16 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F3X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
default 9 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F3X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32F3X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 2-16. PLL output must not exceed 72MHz.
At drivers/clock_control/Kconfig.stm32:305
Included via Kconfig:10
→ Kconfig.zephyr:35
→ drivers/Kconfig:52
→ drivers/clock_control/Kconfig:30
Menu path: (top menu) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control
config CLOCK_STM32_PLL_MULTIPLIER int prompt "PLL multiplier" ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32L0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
range 3 48 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32L0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
default 4 ifCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32L0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
depends onCLOCK_STM32_SYSCLK_SRC_PLL
&&SOC_SERIES_STM32L0X
&&CLOCK_CONTROL_STM32_CUBE
&&SOC_FAMILY_STM32
&&CLOCK_CONTROL
help PLL multiplier, allowed values: 3, 4, 6, 8, 12, 16, 24, 32, 48. PLL output must not exceed 96MHz(1.8V)/48MHz(1.5V)/24MHz(1.2V).
(Definitions include propagated dependencies, including from if’s and menus.)