The latest development version of this page may be more current than this released 2.7.0 version.

CONFIG_SOC_ANDES_V5_PMA

Enable Andes V5 Physical Memory Attribute (PMA)

Type: bool

Help

This option enables the Andes V5 PMA, in order to support SW to
configure physical memory attribute by PMA CSRs. The address
matching of Andes V5 PMA is like RISC-V PMP NAPOT mode
(power-of-two alignment).

Direct dependencies

SOC_SERIES_RISCV_ANDES_V5

(Includes any dependencies from ifs and menus.)

Defaults

No defaults. Implicitly defaults to n.

Symbols selected by this symbol

• ARCH_HAS_NOCACHE_MEMORY_SUPPORT

Kconfig definition

At soc/riscv/riscv-privilege/andes_v5/Kconfig.soc:72

Included via Kconfig:8 → Kconfig.zephyr:38 → soc/Kconfig:18 → soc/riscv/riscv-privilege/Kconfig:22

Menu path: (Top) → Hardware Configuration

config SOC_ANDES_V5_PMA
    bool "Enable Andes V5 Physical Memory Attribute (PMA)"
    select ARCH_HAS_NOCACHE_MEMORY_SUPPORT
    depends on SOC_SERIES_RISCV_ANDES_V5
    help
      This option enables the Andes V5 PMA, in order to support SW to
      configure physical memory attribute by PMA CSRs. The address
      matching of Andes V5 PMA is like RISC-V PMP NAPOT mode
      (power-of-two alignment).

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)