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arch.h
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1/*
2 * Copyright (c) 2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
16#ifndef ZEPHYR_INCLUDE_ARCH_ARC_ARCH_H_
17#define ZEPHYR_INCLUDE_ARCH_ARC_ARCH_H_
18
19#include <devicetree.h>
20#include <sw_isr_table.h>
21#include <arch/common/ffs.h>
22#include <arch/arc/thread.h>
24#include "sys-io-common.h"
25
26#include <arch/arc/v2/exc.h>
27#include <arch/arc/v2/irq.h>
28#include <arch/arc/v2/misc.h>
33#include <arch/arc/v2/error.h>
34
35#ifdef CONFIG_ARC_CONNECT
37#endif
38
39#ifdef CONFIG_ISA_ARCV2
40#include "v2/sys_io.h"
41#ifdef CONFIG_ARC_HAS_SECURE
43#endif
44#endif
45
46#if defined(CONFIG_ARC_FIRQ) && defined(CONFIG_ISA_ARCV3)
47#error "Unsupported configuration: ARC_FIRQ and ISA_ARCV3"
48#endif
49
50/*
51 * We don't allow the configuration with FIRQ enabled and only one interrupt priority level
52 * (so all interrupts are FIRQ). Such configuration isn't supported in software and it is not
53 * beneficial from the performance point of view.
54 */
55#if defined(CONFIG_ARC_FIRQ) && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
56#error "Unsupported configuration: ARC_FIRQ and (NUM_IRQ_PRIO_LEVELS < 2)"
57#endif
58
59#if CONFIG_RGF_NUM_BANKS > 1 && !defined(CONFIG_ARC_FIRQ)
60#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and !ARC_FIRQ"
61#endif
62
63/*
64 * It's required to have more than one interrupt priority level to use second register bank
65 * - otherwise all interrupts will use same register bank. Such configuration isn't supported in
66 * software and it is not beneficial from the performance point of view.
67 */
68#if CONFIG_RGF_NUM_BANKS > 1 && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
69#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and (NUM_IRQ_PRIO_LEVELS < 2)"
70#endif
71
72#if defined(CONFIG_ARC_FIRQ_STACK) && !defined(CONFIG_ARC_FIRQ)
73#error "Unsupported configuration: ARC_FIRQ_STACK and !ARC_FIRQ"
74#endif
75
76#if defined(CONFIG_ARC_FIRQ_STACK) && CONFIG_RGF_NUM_BANKS < 2
77#error "Unsupported configuration: ARC_FIRQ_STACK and (RGF_NUM_BANKS < 2)"
78#endif
79
80#ifndef _ASMLANGUAGE
81
82#ifdef __cplusplus
83extern "C" {
84#endif
85
86#ifdef CONFIG_64BIT
87#define ARCH_STACK_PTR_ALIGN 8
88#else
89#define ARCH_STACK_PTR_ALIGN 4
90#endif /* CONFIG_64BIT */
91
92/* Indicate, for a minimally sized MPU region, how large it must be and what
93 * its base address must be aligned to.
94 *
95 * For regions that are NOT the minimum size, this define has no semantics
96 * on ARC MPUv2 as its regions must be power of two size and aligned to their
97 * own size. On ARC MPUv4, region sizes are arbitrary and this just indicates
98 * the required size granularity.
99 */
100#ifdef CONFIG_ARC_CORE_MPU
101#if CONFIG_ARC_MPU_VER == 2
102#define Z_ARC_MPU_ALIGN 2048
103#elif (CONFIG_ARC_MPU_VER == 3) || (CONFIG_ARC_MPU_VER == 4) || (CONFIG_ARC_MPU_VER == 6)
104#define Z_ARC_MPU_ALIGN 32
105#else
106#error "Unsupported MPU version"
107#endif
108#endif
109
110#ifdef CONFIG_MPU_STACK_GUARD
111#define Z_ARC_STACK_GUARD_SIZE Z_ARC_MPU_ALIGN
112#else
113#define Z_ARC_STACK_GUARD_SIZE 0
114#endif
115
116/* Kernel-only stacks have the following layout if a stack guard is enabled:
117 *
118 * +------------+ <- thread.stack_obj
119 * | Guard | } Z_ARC_STACK_GUARD_SIZE
120 * +------------+ <- thread.stack_info.start
121 * | Kernel |
122 * | stack |
123 * | |
124 * +............|
125 * | TLS | } thread.stack_info.delta
126 * +------------+ <- thread.stack_info.start + thread.stack_info.size
127 */
128#ifdef CONFIG_MPU_STACK_GUARD
129#define ARCH_KERNEL_STACK_RESERVED Z_ARC_STACK_GUARD_SIZE
130#define ARCH_KERNEL_STACK_OBJ_ALIGN Z_ARC_MPU_ALIGN
131#endif
132
133#ifdef CONFIG_USERSPACE
134/* Any thread running In user mode will have full access to the region denoted
135 * by thread.stack_info.
136 *
137 * Thread-local storage is at the very highest memory locations of this area.
138 * Memory for TLS and any initial random stack pointer offset is captured
139 * in thread.stack_info.delta.
140 */
141#ifdef CONFIG_MPU_STACK_GUARD
142/* MPU guards are only supported with V3 MPU and later. In this configuration
143 * the stack object will contain the MPU guard, the privilege stack, and then
144 * the stack buffer in that order:
145 *
146 * +------------+ <- thread.stack_obj
147 * | Guard | } Z_ARC_STACK_GUARD_SIZE
148 * +------------+ <- thread.arch.priv_stack_start
149 * | Priv Stack | } CONFIG_PRIVILEGED_STACK_SIZE
150 * +------------+ <- thread.stack_info.start
151 * | Thread |
152 * | stack |
153 * | |
154 * +............|
155 * | TLS | } thread.stack_info.delta
156 * +------------+ <- thread.stack_info.start + thread.stack_info.size
157 */
158#define ARCH_THREAD_STACK_RESERVED (Z_ARC_STACK_GUARD_SIZE + \
159 CONFIG_PRIVILEGED_STACK_SIZE)
160#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_ARC_MPU_ALIGN
161/* We need to be able to exactly cover the stack buffer with an MPU region,
162 * so round its size up to the required granularity of the MPU
163 */
164#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
165 (ROUND_UP((size), Z_ARC_MPU_ALIGN))
166BUILD_ASSERT(CONFIG_PRIVILEGED_STACK_SIZE % Z_ARC_MPU_ALIGN == 0,
167 "improper privilege stack size");
168#else /* !CONFIG_MPU_STACK_GUARD */
169/* Userspace enabled, but supervisor stack guards are not in use */
170#ifdef CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
171/* Use defaults for everything. The privilege elevation stack is located
172 * in another area of memory generated at build time by gen_kobject_list.py
173 *
174 * +------------+ <- thread.arch.priv_stack_start
175 * | Priv Stack | } Z_KERNEL_STACK_LEN(CONFIG_PRIVILEGED_STACK_SIZE)
176 * +------------+
177 *
178 * +------------+ <- thread.stack_obj = thread.stack_info.start
179 * | Thread |
180 * | stack |
181 * | |
182 * +............|
183 * | TLS | } thread.stack_info.delta
184 * +------------+ <- thread.stack_info.start + thread.stack_info.size
185 */
186#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
187 Z_POW2_CEIL(ROUND_UP((size), Z_ARC_MPU_ALIGN))
188#define ARCH_THREAD_STACK_OBJ_ALIGN(size) \
189 ARCH_THREAD_STACK_SIZE_ADJUST(size)
190#define ARCH_THREAD_STACK_RESERVED 0
191#else /* !CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT */
192/* Reserved area of the thread object just contains the privilege stack:
193 *
194 * +------------+ <- thread.stack_obj = thread.arch.priv_stack_start
195 * | Priv Stack | } CONFIG_PRIVILEGED_STACK_SIZE
196 * +------------+ <- thread.stack_info.start
197 * | Thread |
198 * | stack |
199 * | |
200 * +............|
201 * | TLS | } thread.stack_info.delta
202 * +------------+ <- thread.stack_info.start + thread.stack_info.size
203 */
204#define ARCH_THREAD_STACK_RESERVED CONFIG_PRIVILEGED_STACK_SIZE
205#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
206 (ROUND_UP((size), Z_ARC_MPU_ALIGN))
207#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_ARC_MPU_ALIGN
208
209BUILD_ASSERT(CONFIG_PRIVILEGED_STACK_SIZE % Z_ARC_MPU_ALIGN == 0,
210 "improper privilege stack size");
211#endif /* CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT */
212#endif /* CONFIG_MPU_STACK_GUARD */
213
214#else /* !CONFIG_USERSPACE */
215
216#ifdef CONFIG_MPU_STACK_GUARD
217/* Only supported on ARC MPU V3 and higher. Reserve some memory for the stack
218 * guard. This is just a minimally-sized region at the beginning of the stack
219 * object, which is programmed to produce an exception if written to.
220 *
221 * +------------+ <- thread.stack_obj
222 * | Guard | } Z_ARC_STACK_GUARD_SIZE
223 * +------------+ <- thread.stack_info.start
224 * | Thread |
225 * | stack |
226 * | |
227 * +............|
228 * | TLS | } thread.stack_info.delta
229 * +------------+ <- thread.stack_info.start + thread.stack_info.size
230 */
231#define ARCH_THREAD_STACK_RESERVED Z_ARC_STACK_GUARD_SIZE
232#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_ARC_MPU_ALIGN
233/* Default for ARCH_THREAD_STACK_SIZE_ADJUST */
234#else /* !CONFIG_MPU_STACK_GUARD */
235/* No stack guard, no userspace, Use defaults for everything. */
236#endif /* CONFIG_MPU_STACK_GUARD */
237#endif /* CONFIG_USERSPACE */
238
239#ifdef CONFIG_ARC_MPU
240
241/* Legacy case: retain containing extern "C" with C++ */
243
244#define K_MEM_PARTITION_P_NA_U_NA AUX_MPU_ATTR_N
245#define K_MEM_PARTITION_P_RW_U_RW (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_UR | \
246 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR)
247#define K_MEM_PARTITION_P_RW_U_RO (AUX_MPU_ATTR_UR | \
248 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR)
249#define K_MEM_PARTITION_P_RW_U_NA (AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR)
250#define K_MEM_PARTITION_P_RO_U_RO (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)
251#define K_MEM_PARTITION_P_RO_U_NA (AUX_MPU_ATTR_KR)
252
253/* Execution-allowed attributes */
254#define K_MEM_PARTITION_P_RWX_U_RWX (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_UR | \
255 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR | \
256 AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE)
257#define K_MEM_PARTITION_P_RWX_U_RX (AUX_MPU_ATTR_UR | \
258 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR | \
259 AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE)
260#define K_MEM_PARTITION_P_RX_U_RX (AUX_MPU_ATTR_UR | \
261 AUX_MPU_ATTR_KR | \
262 AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE)
263
264#define K_MEM_PARTITION_IS_WRITABLE(attr) \
265 ({ \
266 int __is_writable__; \
267 switch (attr & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) { \
268 case (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW): \
269 case AUX_MPU_ATTR_UW: \
270 case AUX_MPU_ATTR_KW: \
271 __is_writable__ = 1; \
272 break; \
273 default: \
274 __is_writable__ = 0; \
275 break; \
276 } \
277 __is_writable__; \
278 })
279#define K_MEM_PARTITION_IS_EXECUTABLE(attr) \
280 ((attr) & (AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE))
281
282/*
283 * BUILD_ASSERT in case of MWDT is a bit more picky in performing compile-time check.
284 * For example it can't evaluate variable address at build time like GCC toolchain can do.
285 * That's why we provide custom _ARCH_MEM_PARTITION_ALIGN_CHECK implementation for MWDT toolchain
286 * with additional check for arguments availability in compile time.
287 */
288#ifdef __CCAC__
289#define IS_BUILTIN_MWDT(val) __builtin_constant_p((uintptr_t)(val))
290#if CONFIG_ARC_MPU_VER == 2 || CONFIG_ARC_MPU_VER == 3 || CONFIG_ARC_MPU_VER == 6
291#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
292 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? !((size) & ((size) - 1)) : 1, \
293 "partition size must be power of 2"); \
294 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? (size) >= Z_ARC_MPU_ALIGN : 1, \
295 "partition size must be >= mpu address alignment."); \
296 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? IS_BUILTIN_MWDT(start) ? \
297 !((uintptr_t)(start) & ((size) - 1)) : 1 : 1, \
298 "partition start address must align with size.")
299#elif CONFIG_ARC_MPU_VER == 4
300#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
301 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? (size) % Z_ARC_MPU_ALIGN == 0 : 1, \
302 "partition size must align with " STRINGIFY(Z_ARC_MPU_ALIGN)); \
303 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? (size) >= Z_ARC_MPU_ALIGN : 1, \
304 "partition size must be >= " STRINGIFY(Z_ARC_MPU_ALIGN)); \
305 BUILD_ASSERT(IS_BUILTIN_MWDT(start) ? (uintptr_t)(start) % Z_ARC_MPU_ALIGN == 0 : 1, \
306 "partition start address must align with " STRINGIFY(Z_ARC_MPU_ALIGN))
307#endif
308#else /* __CCAC__ */
309#if CONFIG_ARC_MPU_VER == 2 || CONFIG_ARC_MPU_VER == 3 || CONFIG_ARC_MPU_VER == 6
310#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
311 BUILD_ASSERT(!((size) & ((size) - 1)), \
312 "partition size must be power of 2"); \
313 BUILD_ASSERT((size) >= Z_ARC_MPU_ALIGN, \
314 "partition size must be >= mpu address alignment."); \
315 BUILD_ASSERT(!((uintptr_t)(start) & ((size) - 1)), \
316 "partition start address must align with size.")
317#elif CONFIG_ARC_MPU_VER == 4
318#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
319 BUILD_ASSERT((size) % Z_ARC_MPU_ALIGN == 0, \
320 "partition size must align with " STRINGIFY(Z_ARC_MPU_ALIGN)); \
321 BUILD_ASSERT((size) >= Z_ARC_MPU_ALIGN, \
322 "partition size must be >= " STRINGIFY(Z_ARC_MPU_ALIGN)); \
323 BUILD_ASSERT((uintptr_t)(start) % Z_ARC_MPU_ALIGN == 0, \
324 "partition start address must align with " STRINGIFY(Z_ARC_MPU_ALIGN))
325#endif
326#endif /* __CCAC__ */
327#endif /* CONFIG_ARC_MPU*/
328
329/* Typedef for the k_mem_partition attribute*/
331
332static ALWAYS_INLINE void arch_nop(void)
333{
334 __builtin_arc_nop();
335}
336
337#endif /* _ASMLANGUAGE */
338
339#ifdef __cplusplus
340}
341#endif
342#endif /* ZEPHYR_INCLUDE_ARCH_ARC_ARCH_H_ */
static ALWAYS_INLINE void arch_nop(void)
Definition: arch.h:332
uint32_t k_mem_partition_attr_t
Definition: arch.h:210
ARCv2 public error handling.
ARCv2 public exception handling.
ARCv2 public kernel miscellaneous.
ARCv2 ARC Connect driver.
Per-arch thread definition.
ARCv2 public interrupt handling.
ARCv2 auxiliary registers definitions.
#define ALWAYS_INLINE
Definition: common.h:124
Devicetree main header.
__UINT32_TYPE__ uint32_t
Definition: stdint.h:60
Software-managed ISR table.