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spi.h
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1/*
2 * Copyright (c) 2015 Intel Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12#ifndef ZEPHYR_INCLUDE_DRIVERS_SPI_H_
13#define ZEPHYR_INCLUDE_DRIVERS_SPI_H_
14
22#include <zephyr/types.h>
23#include <stddef.h>
24#include <device.h>
25#include <dt-bindings/spi/spi.h>
26#include <drivers/gpio.h>
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
36#define SPI_OP_MODE_MASTER 0U
37#define SPI_OP_MODE_SLAVE BIT(0)
38#define SPI_OP_MODE_MASK 0x1U
39#define SPI_OP_MODE_GET(_operation_) ((_operation_) & SPI_OP_MODE_MASK)
52#define SPI_MODE_CPOL BIT(1)
53
61#define SPI_MODE_CPHA BIT(2)
62
68#define SPI_MODE_LOOP BIT(3)
69
70#define SPI_MODE_MASK (0xEU)
71#define SPI_MODE_GET(_mode_) \
72 ((_mode_) & SPI_MODE_MASK)
73
80#define SPI_TRANSFER_MSB (0U)
81#define SPI_TRANSFER_LSB BIT(4)
88#define SPI_WORD_SIZE_SHIFT (5U)
89#define SPI_WORD_SIZE_MASK (0x3FU << SPI_WORD_SIZE_SHIFT)
90#define SPI_WORD_SIZE_GET(_operation_) \
91 (((_operation_) & SPI_WORD_SIZE_MASK) >> SPI_WORD_SIZE_SHIFT)
92
93#define SPI_WORD_SET(_word_size_) \
94 ((_word_size_) << SPI_WORD_SIZE_SHIFT)
101/* Requests - if possible - to keep CS asserted after the transaction */
102#define SPI_HOLD_ON_CS BIT(12)
103/* Keep the device locked after the transaction for the current config.
104 * Use this with extreme caution (see spi_release() below) as it will
105 * prevent other callers to access the SPI device until spi_release() is
106 * properly called.
107 */
108#define SPI_LOCK_ON BIT(13)
109
110/* Active high logic on CS - Usually, and by default, CS logic is active
111 * low. However, some devices may require the reverse logic: active high.
112 * This bit will request the controller to use that logic. Note that not
113 * all controllers are able to handle that natively. In this case deferring
114 * the CS control to a gpio line through struct spi_cs_control would be
115 * the solution.
116 */
117#define SPI_CS_ACTIVE_HIGH BIT(14)
129#define SPI_LINES_SINGLE (0U << 16)
130#define SPI_LINES_DUAL (1U << 16)
131#define SPI_LINES_QUAD (2U << 16)
132#define SPI_LINES_OCTAL (3U << 16)
133
134#define SPI_LINES_MASK (0x3U << 16)
152 union {
154 struct {
155 const struct device *gpio_dev;
158 };
159 };
165};
166
204#define SPI_CS_GPIOS_DT_SPEC_GET(spi_dev) \
205 GPIO_DT_SPEC_GET_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
206
207#ifndef __cplusplus
252#define SPI_CS_CONTROL_PTR_DT(node_id, delay_) \
253 (&(struct spi_cs_control) { \
254 .gpio = SPI_CS_GPIOS_DT_SPEC_GET(node_id), \
255 .delay = (delay_), \
256 })
257
273#define SPI_CS_CONTROL_PTR_DT_INST(inst, delay_) \
274 SPI_CS_CONTROL_PTR_DT(DT_DRV_INST(inst), delay_)
275#endif
276
305#if defined(CONFIG_SPI_EXTENDED_MODES)
308 uint16_t _unused;
309#else
312#endif /* CONFIG_SPI_EXTENDED_MODES */
313
314 const struct spi_cs_control *cs;
315};
316
317#ifndef __cplusplus
337#define SPI_CONFIG_DT(node_id, operation_, delay_) \
338 { \
339 .frequency = DT_PROP(node_id, spi_max_frequency), \
340 .operation = (operation_) | \
341 DT_PROP(node_id, duplex) | \
342 DT_PROP(node_id, frame_format), \
343 .slave = DT_REG_ADDR(node_id), \
344 .cs = COND_CODE_1( \
345 DT_SPI_DEV_HAS_CS_GPIOS(node_id), \
346 (SPI_CS_CONTROL_PTR_DT(node_id, delay_)), \
347 (NULL)), \
348 }
349
363#define SPI_CONFIG_DT_INST(inst, operation_, delay_) \
364 SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
365#endif
366
374 const struct device *bus;
376};
377
378#ifndef __cplusplus
398#define SPI_DT_SPEC_GET(node_id, operation_, delay_) \
399 { \
400 .bus = DEVICE_DT_GET(DT_BUS(node_id)), \
401 .config = SPI_CONFIG_DT(node_id, operation_, delay_) \
402 }
403
417#define SPI_DT_SPEC_INST_GET(inst, operation_, delay_) \
418 SPI_DT_SPEC_GET(DT_DRV_INST(inst), operation_, delay_)
419#endif
420
429struct spi_buf {
430 void *buf;
431 size_t len;
432};
433
441 const struct spi_buf *buffers;
442 size_t count;
443};
444
450typedef int (*spi_api_io)(const struct device *dev,
451 const struct spi_config *config,
452 const struct spi_buf_set *tx_bufs,
453 const struct spi_buf_set *rx_bufs);
454
460typedef int (*spi_api_io_async)(const struct device *dev,
461 const struct spi_config *config,
462 const struct spi_buf_set *tx_bufs,
463 const struct spi_buf_set *rx_bufs,
464 struct k_poll_signal *async);
465
471typedef int (*spi_api_release)(const struct device *dev,
472 const struct spi_config *config);
473
474
479__subsystem struct spi_driver_api {
481#ifdef CONFIG_SPI_ASYNC
483#endif /* CONFIG_SPI_ASYNC */
485};
486
495static inline bool spi_is_ready(const struct spi_dt_spec *spec)
496{
497 /* Validate bus is ready */
498 if (!device_is_ready(spec->bus)) {
499 return false;
500 }
501 /* Validate CS gpio port is ready, if it is used */
502 if (spec->config.cs &&
503 !device_is_ready(spec->config.cs->gpio.port)) {
504 return false;
505 }
506 return true;
507}
508
527__syscall int spi_transceive(const struct device *dev,
528 const struct spi_config *config,
529 const struct spi_buf_set *tx_bufs,
530 const struct spi_buf_set *rx_bufs);
531
532static inline int z_impl_spi_transceive(const struct device *dev,
533 const struct spi_config *config,
534 const struct spi_buf_set *tx_bufs,
535 const struct spi_buf_set *rx_bufs)
536{
537 const struct spi_driver_api *api =
538 (const struct spi_driver_api *)dev->api;
539
540 return api->transceive(dev, config, tx_bufs, rx_bufs);
541}
542
558static inline int spi_transceive_dt(const struct spi_dt_spec *spec,
559 const struct spi_buf_set *tx_bufs,
560 const struct spi_buf_set *rx_bufs)
561{
562 return spi_transceive(spec->bus, &spec->config, tx_bufs, rx_bufs);
563}
564
581static inline int spi_read(const struct device *dev,
582 const struct spi_config *config,
583 const struct spi_buf_set *rx_bufs)
584{
585 return spi_transceive(dev, config, NULL, rx_bufs);
586}
587
600static inline int spi_read_dt(const struct spi_dt_spec *spec,
601 const struct spi_buf_set *rx_bufs)
602{
603 return spi_read(spec->bus, &spec->config, rx_bufs);
604}
605
622static inline int spi_write(const struct device *dev,
623 const struct spi_config *config,
624 const struct spi_buf_set *tx_bufs)
625{
626 return spi_transceive(dev, config, tx_bufs, NULL);
627}
628
641static inline int spi_write_dt(const struct spi_dt_spec *spec,
642 const struct spi_buf_set *tx_bufs)
643{
644 return spi_write(spec->bus, &spec->config, tx_bufs);
645}
646
647/* Doxygen defines this so documentation is generated. */
648#ifdef CONFIG_SPI_ASYNC
649
675static inline int spi_transceive_async(const struct device *dev,
676 const struct spi_config *config,
677 const struct spi_buf_set *tx_bufs,
678 const struct spi_buf_set *rx_bufs,
679 struct k_poll_signal *async)
680{
681 const struct spi_driver_api *api =
682 (const struct spi_driver_api *)dev->api;
683
684 return api->transceive_async(dev, config, tx_bufs, rx_bufs, async);
685}
686
710static inline int spi_read_async(const struct device *dev,
711 const struct spi_config *config,
712 const struct spi_buf_set *rx_bufs,
713 struct k_poll_signal *async)
714{
715 return spi_transceive_async(dev, config, NULL, rx_bufs, async);
716}
717
741static inline int spi_write_async(const struct device *dev,
742 const struct spi_config *config,
743 const struct spi_buf_set *tx_bufs,
744 struct k_poll_signal *async)
745{
746 return spi_transceive_async(dev, config, tx_bufs, NULL, async);
747}
748#endif /* CONFIG_SPI_ASYNC */
749
770__syscall int spi_release(const struct device *dev,
771 const struct spi_config *config);
772
773static inline int z_impl_spi_release(const struct device *dev,
774 const struct spi_config *config)
775{
776 const struct spi_driver_api *api =
777 (const struct spi_driver_api *)dev->api;
778
779 return api->release(dev, config);
780}
781
793static inline int spi_release_dt(const struct spi_dt_spec *spec)
794{
795 return spi_release(spec->bus, &spec->config);
796}
797
798#ifdef __cplusplus
799}
800#endif
801
806#include <syscalls/spi.h>
807
808#endif /* ZEPHYR_INCLUDE_DRIVERS_SPI_H_ */
Public APIs for GPIO drivers.
bool device_is_ready(const struct device *dev)
Verify that a device is ready for use.
uint8_t gpio_dt_flags_t
Provides a type to hold GPIO devicetree flags.
Definition: gpio.h:317
uint8_t gpio_pin_t
Provides a type to hold a GPIO pin index.
Definition: gpio.h:308
static int spi_write_async(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs, struct k_poll_signal *async)
Write the specified amount of data from the SPI driver.
Definition: spi.h:741
int spi_release(const struct device *dev, const struct spi_config *config)
Release the SPI device locked on and/or the CS by the current config.
int(* spi_api_io_async)(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs, struct k_poll_signal *async)
Definition: spi.h:460
static int spi_write_dt(const struct spi_dt_spec *spec, const struct spi_buf_set *tx_bufs)
Write data to a SPI bus specified in spi_dt_spec.
Definition: spi.h:641
static int spi_read(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *rx_bufs)
Read the specified amount of data from the SPI driver.
Definition: spi.h:581
static int spi_transceive_dt(const struct spi_dt_spec *spec, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs)
Read/write data from an SPI bus specified in spi_dt_spec.
Definition: spi.h:558
static int spi_transceive_async(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs, struct k_poll_signal *async)
Read/write the specified amount of data from the SPI driver.
Definition: spi.h:675
static int spi_read_dt(const struct spi_dt_spec *spec, const struct spi_buf_set *rx_bufs)
Read data from a SPI bus specified in spi_dt_spec.
Definition: spi.h:600
static bool spi_is_ready(const struct spi_dt_spec *spec)
Validate that SPI bus is ready.
Definition: spi.h:495
static int spi_write(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs)
Write the specified amount of data from the SPI driver.
Definition: spi.h:622
static int spi_release_dt(const struct spi_dt_spec *spec)
Release the SPI device specified in spi_dt_spec.
Definition: spi.h:793
int(* spi_api_release)(const struct device *dev, const struct spi_config *config)
Callback API for unlocking SPI device. See spi_release() for argument descriptions.
Definition: spi.h:471
int(* spi_api_io)(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs)
Callback API for I/O See spi_transceive() for argument descriptions.
Definition: spi.h:450
static int spi_read_async(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *rx_bufs, struct k_poll_signal *async)
Read the specified amount of data from the SPI driver.
Definition: spi.h:710
int spi_transceive(const struct device *dev, const struct spi_config *config, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs)
Read/write the specified amount of data from the SPI driver.
__UINT32_TYPE__ uint32_t
Definition: stdint.h:60
__UINT16_TYPE__ uint16_t
Definition: stdint.h:59
Runtime device structure (in ROM) per driver instance.
Definition: device.h:450
const void * api
Definition: device.h:456
Container for GPIO pin information specified in devicetree.
Definition: gpio.h:339
const struct device * port
Definition: gpio.h:341
Definition: kernel.h:5393
SPI buffer array structure.
Definition: spi.h:440
const struct spi_buf * buffers
Definition: spi.h:441
size_t count
Definition: spi.h:442
SPI buffer structure.
Definition: spi.h:429
size_t len
Definition: spi.h:431
void * buf
Definition: spi.h:430
SPI controller configuration structure.
Definition: spi.h:303
uint16_t slave
Definition: spi.h:311
const struct spi_cs_control * cs
Definition: spi.h:314
uint32_t frequency
Definition: spi.h:304
uint16_t operation
Definition: spi.h:310
SPI Chip Select control structure.
Definition: spi.h:144
uint32_t delay
Definition: spi.h:164
gpio_pin_t gpio_pin
Definition: spi.h:156
gpio_dt_flags_t gpio_dt_flags
Definition: spi.h:157
struct gpio_dt_spec gpio
Definition: spi.h:153
const struct device * gpio_dev
Definition: spi.h:155
SPI driver API This is the mandatory API any SPI driver needs to expose.
Definition: spi.h:479
spi_api_io transceive
Definition: spi.h:480
spi_api_release release
Definition: spi.h:484
spi_api_io_async transceive_async
Definition: spi.h:482
Complete SPI DT information.
Definition: spi.h:373
const struct device * bus
Definition: spi.h:374
struct spi_config config
Definition: spi.h:375