Zephyr API Documentation  3.0.0
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nrf-pinctrl.h
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1/*
2 * Copyright (c) 2021 Nordic Semiconductor ASA
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_
7#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_
8
9/*
10 * The whole nRF pin configuration information is encoded in a 32-bit bitfield
11 * organized as follows:
12 *
13 * - 31..16: Pin function.
14 * - 15..13: Reserved.
15 * - 12: Pin low power mode.
16 * - 11..8: Pin output drive configuration.
17 * - 7..6: Pin pull configuration.
18 * - 5..0: Pin number (combination of port and pin).
19 */
20
27#define NRF_FUN_POS 16U
29#define NRF_FUN_MSK 0xFFFFU
31#define NRF_LP_POS 12U
33#define NRF_LP_MSK 0x1U
35#define NRF_DRIVE_POS 8U
37#define NRF_DRIVE_MSK 0xFU
39#define NRF_PULL_POS 6U
41#define NRF_PULL_MSK 0x3U
43#define NRF_PIN_POS 0U
45#define NRF_PIN_MSK 0x3FU
46
55#define NRF_FUN_UART_TX 0U
57#define NRF_FUN_UART_RX 1U
59#define NRF_FUN_UART_RTS 2U
61#define NRF_FUN_UART_CTS 3U
62
72#define NRF_DRIVE_S0S1 0U
74#define NRF_DRIVE_H0S1 1U
76#define NRF_DRIVE_S0H1 2U
78#define NRF_DRIVE_H0H1 3U
80#define NRF_DRIVE_D0S1 4U
82#define NRF_DRIVE_D0H1 5U
84#define NRF_DRIVE_S0D1 6U
86#define NRF_DRIVE_H0D1 7U
88#define NRF_DRIVE_E0E1 11U
89
99#define NRF_PULL_NONE 0U
101#define NRF_PULL_DOWN 1U
103#define NRF_PULL_UP 3U
104
113#define NRF_LP_DISABLE 0U
115#define NRF_LP_ENABLE 1U
116
126#define NRF_PSEL(fun, port, pin) \
127 ((((((port) * 32U) + (pin)) & NRF_PIN_MSK) << NRF_PIN_POS) | \
128 ((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
129
130#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_ */