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mipi_dsi.h
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1/*
2 * Copyright (c) 2020 Teslabs Engineering S.L.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
12#ifndef ZEPHYR_INCLUDE_DRIVERS_MIPI_DSI_H_
13#define ZEPHYR_INCLUDE_DRIVERS_MIPI_DSI_H_
14
21#include <sys/types.h>
22#include <zephyr/device.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
34#define MIPI_DCS_NOP 0x00U
35#define MIPI_DCS_SOFT_RESET 0x01U
36#define MIPI_DCS_GET_COMPRESSION_MODE 0x03U
37#define MIPI_DCS_GET_DISPLAY_ID 0x04U
38#define MIPI_DCS_GET_RED_CHANNEL 0x06U
39#define MIPI_DCS_GET_GREEN_CHANNEL 0x07U
40#define MIPI_DCS_GET_BLUE_CHANNEL 0x08U
41#define MIPI_DCS_GET_DISPLAY_STATUS 0x09U
42#define MIPI_DCS_GET_POWER_MODE 0x0AU
43#define MIPI_DCS_GET_ADDRESS_MODE 0x0BU
44#define MIPI_DCS_GET_PIXEL_FORMAT 0x0CU
45#define MIPI_DCS_GET_DISPLAY_MODE 0x0DU
46#define MIPI_DCS_GET_SIGNAL_MODE 0x0EU
47#define MIPI_DCS_GET_DIAGNOSTIC_RESULT 0x0FU
48#define MIPI_DCS_ENTER_SLEEP_MODE 0x10U
49#define MIPI_DCS_EXIT_SLEEP_MODE 0x11U
50#define MIPI_DCS_ENTER_PARTIAL_MODE 0x12U
51#define MIPI_DCS_ENTER_NORMAL_MODE 0x13U
52#define MIPI_DCS_EXIT_INVERT_MODE 0x20U
53#define MIPI_DCS_ENTER_INVERT_MODE 0x21U
54#define MIPI_DCS_SET_GAMMA_CURVE 0x26U
55#define MIPI_DCS_SET_DISPLAY_OFF 0x28U
56#define MIPI_DCS_SET_DISPLAY_ON 0x29U
57#define MIPI_DCS_SET_COLUMN_ADDRESS 0x2AU
58#define MIPI_DCS_SET_PAGE_ADDRESS 0x2BU
59#define MIPI_DCS_WRITE_MEMORY_START 0x2CU
60#define MIPI_DCS_WRITE_LUT 0x2DU
61#define MIPI_DCS_READ_MEMORY_START 0x2EU
62#define MIPI_DCS_SET_PARTIAL_ROWS 0x30U
63#define MIPI_DCS_SET_PARTIAL_COLUMNS 0x31U
64#define MIPI_DCS_SET_SCROLL_AREA 0x33U
65#define MIPI_DCS_SET_TEAR_OFF 0x34U
66#define MIPI_DCS_SET_TEAR_ON 0x35U
67#define MIPI_DCS_SET_ADDRESS_MODE 0x36U
68#define MIPI_DCS_SET_SCROLL_START 0x37U
69#define MIPI_DCS_EXIT_IDLE_MODE 0x38U
70#define MIPI_DCS_ENTER_IDLE_MODE 0x39U
71#define MIPI_DCS_SET_PIXEL_FORMAT 0x3AU
72#define MIPI_DCS_WRITE_MEMORY_CONTINUE 0x3CU
73#define MIPI_DCS_SET_3D_CONTROL 0x3DU
74#define MIPI_DCS_READ_MEMORY_CONTINUE 0x3EU
75#define MIPI_DCS_GET_3D_CONTROL 0x3FU
76#define MIPI_DCS_SET_VSYNC_TIMING 0x40U
77#define MIPI_DCS_SET_TEAR_SCANLINE 0x44U
78#define MIPI_DCS_GET_SCANLINE 0x45U
79#define MIPI_DCS_SET_DISPLAY_BRIGHTNESS 0x51U
80#define MIPI_DCS_GET_DISPLAY_BRIGHTNESS 0x52U
81#define MIPI_DCS_WRITE_CONTROL_DISPLAY 0x53U
82#define MIPI_DCS_GET_CONTROL_DISPLAY 0x54U
83#define MIPI_DCS_WRITE_POWER_SAVE 0x55U
84#define MIPI_DCS_GET_POWER_SAVE 0x56U
85#define MIPI_DCS_SET_CABC_MIN_BRIGHTNESS 0x5EU
86#define MIPI_DCS_GET_CABC_MIN_BRIGHTNESS 0x5FU
87#define MIPI_DCS_READ_DDB_START 0xA1U
88#define MIPI_DCS_READ_DDB_CONTINUE 0xA8U
89
90#define MIPI_DCS_PIXEL_FORMAT_24BIT 0x77
91#define MIPI_DCS_PIXEL_FORMAT_18BIT 0x66
92#define MIPI_DCS_PIXEL_FORMAT_16BIT 0x55
93#define MIPI_DCS_PIXEL_FORMAT_12BIT 0x33
94#define MIPI_DCS_PIXEL_FORMAT_8BIT 0x22
95#define MIPI_DCS_PIXEL_FORMAT_3BIT 0x11
96
104#define MIPI_DCS_ADDRESS_MODE_MIRROR_Y BIT(7)
105#define MIPI_DCS_ADDRESS_MODE_MIRROR_X BIT(6)
106#define MIPI_DCS_ADDRESS_MODE_SWAP_XY BIT(5)
107#define MIPI_DCS_ADDRESS_MODE_REFRESH_BT BIT(4)
108#define MIPI_DCS_ADDRESS_MODE_BGR BIT(3)
109#define MIPI_DCS_ADDRESS_MODE_LATCH_RL BIT(2)
110#define MIPI_DCS_ADDRESS_MODE_FLIP_X BIT(1)
111#define MIPI_DCS_ADDRESS_MODE_FLIP_Y BIT(0)
112
120#define MIPI_DSI_V_SYNC_START 0x01U
121#define MIPI_DSI_V_SYNC_END 0x11U
122#define MIPI_DSI_H_SYNC_START 0x21U
123#define MIPI_DSI_H_SYNC_END 0x31U
124#define MIPI_DSI_COLOR_MODE_OFF 0x02U
125#define MIPI_DSI_COLOR_MODE_ON 0x12U
126#define MIPI_DSI_SHUTDOWN_PERIPHERAL 0x22U
127#define MIPI_DSI_TURN_ON_PERIPHERAL 0x32U
128#define MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM 0x03U
129#define MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM 0x13U
130#define MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM 0x23U
131#define MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM 0x04U
132#define MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM 0x14U
133#define MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM 0x24U
134#define MIPI_DSI_DCS_SHORT_WRITE 0x05U
135#define MIPI_DSI_DCS_SHORT_WRITE_PARAM 0x15U
136#define MIPI_DSI_DCS_READ 0x06U
137#define MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE 0x37U
138#define MIPI_DSI_END_OF_TRANSMISSION 0x08U
139#define MIPI_DSI_NULL_PACKET 0x09U
140#define MIPI_DSI_BLANKING_PACKET 0x19U
141#define MIPI_DSI_GENERIC_LONG_WRITE 0x29U
142#define MIPI_DSI_DCS_LONG_WRITE 0x39U
143#define MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 0x0CU
144#define MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 0x1CU
145#define MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 0x2CU
146#define MIPI_DSI_PACKED_PIXEL_STREAM_30 0x0DU
147#define MIPI_DSI_PACKED_PIXEL_STREAM_36 0x1DU
148#define MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 0x3DU
149#define MIPI_DSI_PACKED_PIXEL_STREAM_16 0x0EU
150#define MIPI_DSI_PACKED_PIXEL_STREAM_18 0x1EU
151#define MIPI_DSI_PIXEL_STREAM_3BYTE_18 0x2EU
152#define MIPI_DSI_PACKED_PIXEL_STREAM_24 0x3EU
153
174};
175
182#define MIPI_DSI_MODE_VIDEO BIT(0)
184#define MIPI_DSI_MODE_VIDEO_BURST BIT(1)
186#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2)
188#define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3)
190#define MIPI_DSI_MODE_VIDEO_HSE BIT(4)
192#define MIPI_DSI_MODE_VIDEO_HFP BIT(5)
194#define MIPI_DSI_MODE_VIDEO_HBP BIT(6)
196#define MIPI_DSI_MODE_VIDEO_HSA BIT(7)
198#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
200#define MIPI_DSI_MODE_EOT_PACKET BIT(9)
202#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
204#define MIPI_DSI_MODE_LPM BIT(11)
205
218};
219
229 size_t tx_len;
231 const void *tx_buf;
233 size_t rx_len;
235 void *rx_buf;
236};
237
239__subsystem struct mipi_dsi_driver_api {
240 int (*attach)(const struct device *dev, uint8_t channel,
241 const struct mipi_dsi_device *mdev);
242 ssize_t (*transfer)(const struct device *dev, uint8_t channel,
243 struct mipi_dsi_msg *msg);
244};
245
255static inline int mipi_dsi_attach(const struct device *dev,
256 uint8_t channel,
257 const struct mipi_dsi_device *mdev)
258{
259 const struct mipi_dsi_driver_api *api = (const struct mipi_dsi_driver_api *)dev->api;
260
261 return api->attach(dev, channel, mdev);
262}
263
273static inline ssize_t mipi_dsi_transfer(const struct device *dev,
274 uint8_t channel,
275 struct mipi_dsi_msg *msg)
276{
277 const struct mipi_dsi_driver_api *api = (const struct mipi_dsi_driver_api *)dev->api;
278
279 return api->transfer(dev, channel, msg);
280}
281
294ssize_t mipi_dsi_generic_read(const struct device *dev, uint8_t channel,
295 const void *params, size_t nparams,
296 void *buf, size_t len);
297
308ssize_t mipi_dsi_generic_write(const struct device *dev, uint8_t channel,
309 const void *buf, size_t len);
310
322ssize_t mipi_dsi_dcs_read(const struct device *dev, uint8_t channel,
323 uint8_t cmd, void *buf, size_t len);
324
336ssize_t mipi_dsi_dcs_write(const struct device *dev, uint8_t channel,
337 uint8_t cmd, const void *buf, size_t len);
338
339#ifdef __cplusplus
340}
341#endif
342
347#endif /* ZEPHYR_INCLUDE_DRIVERS_MIPI_DSI_H_ */
static void cmd(uint32_t command)
Execute a display list command by co-processor engine.
Definition: ft8xx_reference_api.h:153
ssize_t mipi_dsi_generic_read(const struct device *dev, uint8_t channel, const void *params, size_t nparams, void *buf, size_t len)
MIPI-DSI generic read.
static int mipi_dsi_attach(const struct device *dev, uint8_t channel, const struct mipi_dsi_device *mdev)
Attach a new device to the MIPI-DSI bus.
Definition: mipi_dsi.h:255
ssize_t mipi_dsi_generic_write(const struct device *dev, uint8_t channel, const void *buf, size_t len)
MIPI-DSI generic write.
ssize_t mipi_dsi_dcs_read(const struct device *dev, uint8_t channel, uint8_t cmd, void *buf, size_t len)
MIPI-DSI DCS read.
static ssize_t mipi_dsi_transfer(const struct device *dev, uint8_t channel, struct mipi_dsi_msg *msg)
Transfer data to/from a device attached to the MIPI-DSI bus.
Definition: mipi_dsi.h:273
ssize_t mipi_dsi_dcs_write(const struct device *dev, uint8_t channel, uint8_t cmd, const void *buf, size_t len)
MIPI-DSI DCS write.
__SIZE_TYPE__ ssize_t
Definition: types.h:28
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
__UINT8_TYPE__ uint8_t
Definition: stdint.h:88
__UINT16_TYPE__ uint16_t
Definition: stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition: device.h:381
const void * api
Address of the API structure exposed by the device instance.
Definition: device.h:387
MIPI-DSI device.
Definition: mipi_dsi.h:209
uint32_t pixfmt
Pixel format.
Definition: mipi_dsi.h:215
uint8_t data_lanes
Number of data lanes.
Definition: mipi_dsi.h:211
uint32_t mode_flags
Mode flags.
Definition: mipi_dsi.h:217
struct mipi_dsi_timings timings
Display timings.
Definition: mipi_dsi.h:213
MIPI-DSI host driver API.
Definition: mipi_dsi.h:239
int(* attach)(const struct device *dev, uint8_t channel, const struct mipi_dsi_device *mdev)
Definition: mipi_dsi.h:240
ssize_t(* transfer)(const struct device *dev, uint8_t channel, struct mipi_dsi_msg *msg)
Definition: mipi_dsi.h:242
MIPI-DSI read/write message.
Definition: mipi_dsi.h:221
uint8_t cmd
Command (only for DCS)
Definition: mipi_dsi.h:227
size_t tx_len
Transmission buffer length.
Definition: mipi_dsi.h:229
const void * tx_buf
Transmission buffer.
Definition: mipi_dsi.h:231
uint8_t type
Payload data type.
Definition: mipi_dsi.h:223
void * rx_buf
Reception buffer.
Definition: mipi_dsi.h:235
size_t rx_len
Reception buffer length.
Definition: mipi_dsi.h:233
uint16_t flags
Flags controlling message transmission.
Definition: mipi_dsi.h:225
MIPI-DSI display timings.
Definition: mipi_dsi.h:157
uint32_t hactive
Horizontal active video.
Definition: mipi_dsi.h:159
uint32_t vsync
Vertical sync length.
Definition: mipi_dsi.h:173
uint32_t hsync
Horizontal sync length.
Definition: mipi_dsi.h:165
uint32_t vfp
Vertical front porch.
Definition: mipi_dsi.h:169
uint32_t vactive
Vertical active video.
Definition: mipi_dsi.h:167
uint32_t hfp
Horizontal front porch.
Definition: mipi_dsi.h:161
uint32_t hbp
Horizontal back porch.
Definition: mipi_dsi.h:163
uint32_t vbp
Vertical back porch.
Definition: mipi_dsi.h:171