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st,hci-spi-v2 (on spi bus)

Vendor: STMicroelectronics

Description

STMicroelectronics SPI protocol V2 compatible with BlueNRG-1 and successor devices

Properties

Properties not inherited from the base binding file.

Name

Type

Details

supply-gpios

phandle-array

 
GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

 
Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

spi-max-frequency

int

 
Maximum clock frequency of device's SPI interface in Hz

This property is required.

duplex

int

 
Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

Legal values: 0, 2048

frame-format

int

 
Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0     SPI_FRAME_FORMAT_MOTOROLA
  32768 SPI_FRAME_FORMAT_TI

Legal values: 0, 32768

spi-cpol

boolean

 
SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

spi-cpha

boolean

 
SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

spi-hold-cs

boolean

 
In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

bt-hci-name

string

 
Name of the HCI transport

Default value: SPI

bt-hci-bus

string

 
Bus of the transport

Default value: BT_HCI_BUS_SPI

Legal values: 'BT_HCI_BUS_VIRTUAL', 'BT_HCI_BUS_USB', 'BT_HCI_BUS_PCCARD', 'BT_HCI_BUS_UART', 'BT_HCI_BUS_RS232', 'BT_HCI_BUS_PCI', 'BT_HCI_BUS_SDIO', 'BT_HCI_BUS_SPI', 'BT_HCI_BUS_I2C', 'BT_HCI_BUS_IPM'

bt-hci-quirks

string-array

 
HCI device quirks

Default value: ['BT_HCI_QUIRK_NO_RESET']

bt-hci-vs-ext

boolean

 
Zephyr HCI vendor extensions are supported

irq-gpios

phandle-array

This property is required.

reset-gpios

phandle-array

This property is required.

reset-assert-duration-ms

int

 
Minimum duration to hold the reset-gpios pin low for. If not specified no delay beyond the code path execution time is guaranteed.

controller-data-delay-us

int

 
Duration to delay between reading a valid header and transceiving the data associated with that header. This delay gives the controller time to configure the SPI data transaction after finishing the header transaction. Without this delay the host can attempt to read/write before the controller is ready, resulting in an ignored transaction that then needs to be performed a second time. The default of 20uS was chosen as the lowest delay that reliably eliminated double transactions between a nRF9160 host and a nRF52832 controller.

Default value: 20