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galaxycore,gc9x01x (on mipi-dbi bus)

Vendor: Galaxycore, Inc.

Description

GC9X01X display driver.

This driver implements support for various GC9X01X graphics
controllers and different display sizes. It has been validated
for following controllers:
 - GC9101A: (Waveshare 240x240, 1.28inch round lcd display 240x240)

Here is an example to define a display interface:

&spi2 {
  gc9a01a_lcd: gc9a01a_lcd@0 {
    compatible = "galaxycore,gc9x01x";
    reg = <0>;
    spi-max-frequency = <100000000>;
    cmd-data-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
    reset-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
    pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
    width = <240>;
    height = <240>;
  };
};

Properties

Node specific propertiesDeprecated node specific propertiesBase properties

Properties not inherited from the base binding file.

Name	Type	Details
supply-gpios	phandle-array	GPIO specifier that controls power to the device. This property should be provided when the device has a dedicated switch that controls power to the device. The supply state is entirely the responsibility of the device driver. Contrast with vin-supply.
vin-supply	phandle	Reference to the regulator that controls power to the device. The referenced devicetree node must have a regulator compatible. This property should be provided when device power is supplied by a shared regulator. The supply state is dependent on the request status of all devices fed by the regulator. Contrast with supply-gpios. If both properties are provided then the regulator must be requested before the supply GPIOS is set to an active state, and the supply GPIOS must be set to an inactive state before releasing the regulator.
mipi-max-frequency	int	Maximum clock frequency of device's MIPI interface in Hz
mipi-mode	int	MIPI DBI mode in use. Use the macros, not the actual enum value. Here is the concordance list (see dt-bindings/mipi_dbi/mipi_dbi.h) 1 MIPI_DBI_MODE_SPI_3WIRE 2 MIPI_DBI_MODE_SPI_4WIRE 3 MIPI_DBI_MODE_6800_BUS_16_BIT 4 MIPI_DBI_MODE_6800_BUS_9_BIT 5 MIPI_DBI_MODE_6800_BUS_8_BIT 6 MIPI_DBI_MODE_8080_BUS_16_BIT 7 MIPI_DBI_MODE_8080_BUS_9_BIT 8 MIPI_DBI_MODE_8080_BUS_8_BIT Legal values: 1, 2, 3, 4, 5, 6, 7, 8
duplex	int	SPI Duplex mode, full or half. By default it's always full duplex thus 0 as this is, by far, the most common mode. Selecting half duplex allows to use SPI MOSI as a bidirectional line, typically used when only one data line is connected. Use the macros not the actual enum value, here is the concordance list (see dt-bindings/spi/spi.h) 0 SPI_FULL_DUPLEX 2048 SPI_HALF_DUPLEX
mipi-cpol	boolean	SPI clock polarity which indicates the clock idle state. If it is used, the clock idle state is logic high; otherwise, low.
mipi-cpha	boolean	SPI clock phase that indicates on which edge data is sampled. If it is used, data is sampled on the second edge; otherwise, on the first edge.
mipi-hold-cs	boolean	In some cases, it is necessary for the master to manage SPI chip select under software control, so that multiple spi transactions can be performed without releasing it. A typical use case is variable length SPI packets where the first spi transaction reads the length and the second spi transaction reads length bytes.
height	int	Height of the panel driven by the controller, with the units in pixels. This property is required.
width	int	Width of the panel driven by the controller, with the units in pixels. This property is required.
pixel-format	int	Initial Pixel format for panel attached to this controller. See dt-bindings/display/panel.h for a list This property is required.
orientation	string	Display orientation (CW) in degrees. Default value: normal Legal values: 'normal', '90', '180', '270'
display-inversion	boolean	Display inversion mode. Every bit is inverted from the frame memory to the display.
pwrctrl1	uint8-array	Power-control 1 register value Default value: [0]
pwrctrl2	uint8-array	Power-control 2 register value Default value: [19]
pwrctrl3	uint8-array	Power-control 3 register value Default value: [19]
pwrctrl4	uint8-array	Power-control 4 register value Default value: [34]
gamma1	uint8-array	Gamma correction 1 register values (negative polarity) Default value: [69, 9, 8, 8, 38, 42]
gamma2	uint8-array	Gamma correction 3 register values Default value: [67, 112, 114, 54, 55, 111]
gamma3	uint8-array	Gamma correction 3 register values (positive polarity) Default value: [69, 9, 8, 8, 38, 42]
gamma4	uint8-array	Gamma correction 4 register values Default value: [67, 112, 114, 54, 55, 111]
framerate	uint8-array	Framerate register value Default value: [52]