nxp,edma
Vendor: NXP Semiconductors
Description
These nodes are “dma” bus nodes.
NXP enhanced Direct Memory Access (eDMA) node
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Number of items to expect in a DMA specifier
This property is required. Constant value: |
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Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.
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Number of DMA channels supported by the controller
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Number of DMA request signals supported by the controller.
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Memory address alignment requirement for DMA buffers used by the controller.
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Memory size alignment requirement for DMA buffers used by the controller.
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Minimal chunk of data possible to be copied by the controller.
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Use this property to specify which channel indexes are
to be considered valid. The difference between this
property and "dma-channels" is the fact that this
property allows you to have "gaps" between the channel
indexes. This is useful in cases where you know you're
not going to be using all of the possible channels, thus
leading to a more readable DTS. Of course, this property
and "dma-channels" are mutually exclusive, meaning you
can't specify both properties as this will lead to a
BUILD_ASSERT() failure.
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Use this property to specify which HAL configuration
should be used. In the case of some SoCs (e.g: i.MX93),
there can be multiple eDMA variants, each of them having
different configurations (e.g: i.MX93 eDMA3 has 31 channels,
i.MX93 eDMA4 has 64 channels and both of them have slightly
different register layouts). To overcome this issue, the HAL
exposes an array of configurations called "edma_hal_configs".
To perform various operations, the HAL uses an eDMA configuration
which will tell it what register layout the IP has, the number of
channels, various flags and offsets. As such, if there's multiple
configurations available, the user will have to specify which
configuration to use through this property. If missing, the
configuration found at index 0 will be used.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,edma” compatible.
Name |
Type |
Details |
|---|---|---|
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Specifier cell names
dma cells: channel, mux