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renesas,smartbond-mipi-dbi

Vendor: Renesas Electronics Corporation

Description

These nodes are “mipi-dbi” bus nodes.

Renesas Smartbond(tm) MIPI DBI Host

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clock-frequency

int

Clock frequency of the SCL signal of the MBI-DBI peripheral, in Hz

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

reset-gpios

phandle-array

Reset GPIO pin. Used to reset the display during initialization.

te-enable

boolean

Boolean to indicate whether the tearing effect (TE) signal is available or not.

te-inversion

boolean

Boolean to apply an inversion on the TE signal that triggers the MIPI DBI controller.

dma-prefetch

string

Host controller will wait for at least the specified number of bytes before triggering
a single frame update. The prefetch mechanism should be enabled when frame buffer(s)
is stored into external storage mediums, e.g. PSRAM, that introduce comparable delays.
In such a case it might case that the controller runs into underrun conditions which
results in correpting the whole frame update. It's user's responsibility to ensure that
the selected value does not exceed frame's total size as otherwise the controller will
not be able to trigger the frame update.

Legal values: 'no-prefetch', 'prefetch-44-bytes', 'prefetch-84-bytes', 'prefetch-116-bytes', 'prefetch-108-bytes'

spi-dev

phandle

SPI bus to use for display read operations. When this property is present, MIPI DBI read
operations will be exhibited by the driver. This is because, the LCDC IP block does not
support read functionality, natively.