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nuvoton,npcx-espi-taf

Vendor: Nuvoton Technology Corporation

Note

An implementation of a driver matching this compatible is available in drivers/espi/espi_taf_npcx.c.

Description

These nodes are “espi” bus nodes.

The target flash devices accessed by Nuvoton eSPI TAF controller.

Representation:

  espi_taf: espitaf@4000a000 {
    compatible = "nuvoton,npcx-espi-taf";
    reg = <0x4000a000 0x2000>;

    mapped-addr = <0x68000000>;
    max-read-sz = "NPCX_ESPI_TAF_MAX_READ_REQ_64B";
    erase-sz = "NPCX_ESPI_TAF_ERASE_BLOCK_SIZE_4KB";

    #address-cells = <1>;
    #size-cells = <1>;
    status = "okay";
  };

Properties

Properties not inherited from the base binding file.

Name

Type

Details

mapped-addr

int

Mapped memory address of direct read access for flash.

This property is required.

erase-sz

string

Erase block size of target flash. The default was 4KB Erase Block Size.
All Intel platforms require support for at least 4 KB Erase Block Size.

This property is required.

Default value: NPCX_ESPI_TAF_ERASE_BLOCK_SIZE_4KB

Legal values: 'NPCX_ESPI_TAF_ERASE_BLOCK_SIZE_4KB', 'NPCX_ESPI_TAF_ERASE_BLOCK_SIZE_32KB', 'NPCX_ESPI_TAF_ERASE_BLOCK_SIZE_64KB', 'NPCX_ESPI_TAF_ERASE_BLOCK_SIZE_128KB'

max-read-sz

string

Maximum read request size of flash access channel. The default was 64 bytes.
This value is recommended in datasheet.

This property is required.

Default value: NPCX_ESPI_TAF_MAX_READ_REQ_64B

Legal values: 'NPCX_ESPI_TAF_MAX_READ_REQ_64B', 'NPCX_ESPI_TAF_MAX_READ_REQ_128B', 'NPCX_ESPI_TAF_MAX_READ_REQ_256B', 'NPCX_ESPI_TAF_MAX_READ_REQ_512B', 'NPCX_ESPI_TAF_MAX_READ_REQ_1024B', 'NPCX_ESPI_TAF_MAX_READ_REQ_2048B', 'NPCX_ESPI_TAF_MAX_READ_REQ_4096B'

rpmc-cntr

int

RPMC counter on RPMC flash devices.

rpmc-op1-code

int

RPMC OP1 opcode on RPMC flash devices.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.