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st,stm32-i2c-v2

Vendor: STMicroelectronics

Note

An implementation of a driver matching this compatible is available in drivers/i2c/i2c_ll_stm32.c.

Description

These nodes are “i2c” bus nodes.

STM32 I2C V2 controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

timings

array

An optional table of pre-computed i2c timing values with the
matching clock configuration.

Precise timings values for a given Hardware can be pre-computed
with a tool like STM32CubeMX or directly from I2C_TIMINGR register
description.

Because timing value is valid for a given I2C peripheral clock
frequency and target I2C bus clock, each timing value must be
provided with the matching configuration.

The resulting table entries should look like <periph_clock
clock-frequency timing>

For example timings could be defined as

    timings = <64000000 I2C_BITRATE_STANDARD 0x10707DBC>,
              <64000000 I2C_BITRATE_FAST 0x00603D56>,
              <56000000 I2C_BITRATE_STANDARD 0x10606DA4>,
              <56000000 I2C_BITRATE_FAST 0x00501D63>;

scl-gpios

phandle-array

GPIO to which the I2C SCL signal is routed. This is only needed for
I2C bus recovery support.

sda-gpios

phandle-array

GPIO to which the I2C SDA signal is routed. This is only needed for
I2C bus recovery support.

clock-frequency

int

Initial clock frequency in Hz

sq-size

int

Size of the submission queue for blocking requests

Default value: 4

cq-size

int

Size of the completion queue for blocking requests

Default value: 4

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.