riscv_plic.h

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/*
 * Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
 
#include <zephyr/device.h>
 
void riscv_plic_irq_enable(uint32_t irq);
 
void riscv_plic_irq_disable(uint32_t irq);
 
int riscv_plic_irq_is_enabled(uint32_t irq);
 
void riscv_plic_set_priority(uint32_t irq, uint32_t prio);
 
int riscv_plic_irq_set_affinity(uint32_t irq, uint32_t cpumask);
 
void riscv_plic_irq_set_pending(uint32_t irq);
 
unsigned int riscv_plic_get_irq(void);
 
const struct device *riscv_plic_get_dev(void);
 
#endif /* ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_ */