Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2020, Linaro Ltd.
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_NVIC_H_
       8              : #define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_NVIC_H_
       9              : 
      10              : #include <zephyr/devicetree.h>
      11              : 
      12              : #if defined(CONFIG_ARMV8_1_M_MAINLINE)
      13              : /* The order here is on purpose since ARMv8.1-M SoCs may define
      14              :  * CONFIG_ARMV6_M_ARMV8_M_BASELINE, CONFIG_ARMV7_M_ARMV8_M_MAINLINE or
      15              :  * CONFIG_ARMV8_M_MAINLINE so we want to check for ARMv8.1-M first.
      16              :  */
      17              : #define NVIC_NODEID DT_INST(0, arm_v8_1m_nvic)
      18              : #elif defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
      19              : #define NVIC_NODEID DT_INST(0, arm_v8m_nvic)
      20              : #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
      21              : #define NVIC_NODEID DT_INST(0, arm_v7m_nvic)
      22              : #elif defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
      23              : #define NVIC_NODEID DT_INST(0, arm_v6m_nvic)
      24              : #endif
      25              : 
      26            0 : #define NUM_IRQ_PRIO_BITS DT_PROP(NVIC_NODEID, arm_num_irq_priority_bits)
      27              : 
      28              : #endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_NVIC_H_ */