Line data Source code
1 0 : /*
2 : * ARMv7 MMU support
3 : *
4 : * Copyright (c) 2021 Weidmueller Interface GmbH & Co. KG
5 : * SPDX-License-Identifier: Apache-2.0
6 : */
7 :
8 : #ifndef ZEPHYR_INCLUDE_ARCH_AARCH32_ARM_MMU_H_
9 : #define ZEPHYR_INCLUDE_ARCH_AARCH32_ARM_MMU_H_
10 :
11 : #ifndef _ASMLANGUAGE
12 :
13 : #include <stdint.h>
14 : #include <stdlib.h>
15 :
16 : /*
17 : * Comp.:
18 : * ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition,
19 : * ARM document ID DDI0406C Rev. d, March 2018
20 : * Memory type definitions:
21 : * Table B3-10, chap. B3.8.2, p. B3-1363f.
22 : * Outer / inner cache attributes for cacheable memory:
23 : * Table B3-11, chap. B3.8.2, p. B3-1364
24 : */
25 :
26 : /*
27 : * The following definitions are used when specifying a memory
28 : * range to be mapped at boot time using the MMU_REGION_ENTRY
29 : * macro.
30 : */
31 0 : #define MT_STRONGLY_ORDERED BIT(0)
32 0 : #define MT_DEVICE BIT(1)
33 0 : #define MT_NORMAL BIT(2)
34 0 : #define MT_MASK 0x7
35 :
36 0 : #define MPERM_R BIT(3)
37 0 : #define MPERM_W BIT(4)
38 0 : #define MPERM_X BIT(5)
39 0 : #define MPERM_UNPRIVILEGED BIT(6)
40 :
41 0 : #define MATTR_NON_SECURE BIT(7)
42 0 : #define MATTR_NON_GLOBAL BIT(8)
43 0 : #define MATTR_SHARED BIT(9)
44 0 : #define MATTR_CACHE_OUTER_WB_WA BIT(10)
45 0 : #define MATTR_CACHE_OUTER_WT_nWA BIT(11)
46 0 : #define MATTR_CACHE_OUTER_WB_nWA BIT(12)
47 0 : #define MATTR_CACHE_INNER_WB_WA BIT(13)
48 0 : #define MATTR_CACHE_INNER_WT_nWA BIT(14)
49 0 : #define MATTR_CACHE_INNER_WB_nWA BIT(15)
50 :
51 0 : #define MATTR_MAY_MAP_L1_SECTION BIT(16)
52 :
53 : /*
54 : * The following macros are used for adding constant entries
55 : * mmu_regions array of the mmu_config struct. Use MMU_REGION_ENTRY
56 : * for the specification of mappings whose PA and VA differ,
57 : * the use of MMU_REGION_FLAT_ENTRY always results in an identity
58 : * mapping, which are used for the mappings of the Zephyr image's
59 : * code and data.
60 : */
61 0 : #define MMU_REGION_ENTRY(_name, _base_pa, _base_va, _size, _attrs) \
62 : {\
63 : .name = _name, \
64 : .base_pa = _base_pa, \
65 : .base_va = _base_va, \
66 : .size = _size, \
67 : .attrs = _attrs, \
68 : }
69 :
70 0 : #define MMU_REGION_FLAT_ENTRY(name, adr, sz, attrs) \
71 : MMU_REGION_ENTRY(name, adr, adr, sz, attrs)
72 :
73 : /*
74 : * @brief Auto generate mmu region entry for node_id
75 : *
76 : * Example usage:
77 : *
78 : * @code{.c}
79 : * DT_FOREACH_STATUS_OKAY_VARGS(nxp_imx_gpio,
80 : * MMU_REGION_DT_FLAT_ENTRY,
81 : * (MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS))
82 : * @endcode
83 : *
84 : * @note Since devicetree_generated.h does not include
85 : * node_id##_P_reg_FOREACH_PROP_ELEM* definitions,
86 : * we can't automate dts node with multiple reg
87 : * entries.
88 : */
89 0 : #define MMU_REGION_DT_FLAT_ENTRY(node_id, attrs) \
90 : MMU_REGION_FLAT_ENTRY(DT_NODE_FULL_NAME(node_id), \
91 : DT_REG_ADDR(node_id), \
92 : DT_REG_SIZE(node_id), \
93 : attrs),
94 :
95 : /*
96 : * @brief Auto generate mmu region entry for status = "okay"
97 : * nodes compatible to a driver
98 : *
99 : * Example usage:
100 : *
101 : * @code{.c}
102 : * MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(nxp_imx_gpio,
103 : * (MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS))
104 : * @endcode
105 : *
106 : * @note This is a wrapper of @ref MMU_REGION_DT_FLAT_ENTRY
107 : */
108 0 : #define MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(compat, attr) \
109 : DT_FOREACH_STATUS_OKAY_VARGS(compat, \
110 : MMU_REGION_DT_FLAT_ENTRY, attr)
111 :
112 : /* Region definition data structure */
113 0 : struct arm_mmu_region {
114 : /* Region Base Physical Address */
115 0 : uintptr_t base_pa;
116 : /* Region Base Virtual Address */
117 0 : uintptr_t base_va;
118 : /* Region size */
119 0 : size_t size;
120 : /* Region Name */
121 0 : const char *name;
122 : /* Region Attributes */
123 0 : uint32_t attrs;
124 : };
125 :
126 : /* MMU configuration data structure */
127 0 : struct arm_mmu_config {
128 : /* Number of regions */
129 0 : uint32_t num_regions;
130 : /* Regions */
131 0 : const struct arm_mmu_region *mmu_regions;
132 : };
133 :
134 : /*
135 : * Reference to the MMU configuration.
136 : *
137 : * This struct is defined and populated for each SoC (in the SoC definition),
138 : * and holds the build-time configuration information for the fixed MMU
139 : * regions enabled during kernel initialization.
140 : */
141 0 : extern const struct arm_mmu_config mmu_config;
142 :
143 : int z_arm_mmu_init(void);
144 :
145 : #endif /* _ASMLANGUAGE */
146 :
147 : #endif /* ZEPHYR_INCLUDE_ARCH_AARCH32_ARM_MMU_H_ */
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