LCOV - code coverage report
Current view: top level - zephyr/arch/arm/mpu - arm_mpu.h Hit Total Coverage
Test: new.info Lines: 0 10 0.0 %
Date: 2024-12-21 18:13:37

          Line data    Source code
       1           0 : /*
       2             :  * Copyright (c) 2017 Linaro Limited.
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : #ifndef ZEPHYR_INCLUDE_ARCH_ARM_MPU_ARM_MPU_H_
       7             : #define ZEPHYR_INCLUDE_ARCH_ARM_MPU_ARM_MPU_H_
       8             : 
       9             : #if defined(CONFIG_CPU_CORTEX_M0PLUS) || \
      10             :         defined(CONFIG_CPU_CORTEX_M3) || \
      11             :         defined(CONFIG_CPU_CORTEX_M4) || \
      12             :         defined(CONFIG_CPU_CORTEX_M7) || \
      13             :         defined(CONFIG_ARMV7_R)
      14             : #include <zephyr/arch/arm/mpu/arm_mpu_v7m.h>
      15             : #elif defined(CONFIG_CPU_CORTEX_M23) || \
      16             :         defined(CONFIG_CPU_CORTEX_M33) || \
      17             :         defined(CONFIG_CPU_CORTEX_M55) || \
      18             :         defined(CONFIG_CPU_CORTEX_M85) || \
      19             :         defined(CONFIG_AARCH32_ARMV8_R)
      20             : #include <zephyr/arch/arm/mpu/arm_mpu_v8.h>
      21             : #else
      22             : #error "Unsupported ARM CPU"
      23             : #endif
      24             : 
      25             : #ifndef _ASMLANGUAGE
      26             : 
      27             : /* Region definition data structure */
      28           0 : struct arm_mpu_region {
      29             :         /* Region Base Address */
      30           0 :         uint32_t base;
      31             :         /* Region Name */
      32           0 :         const char *name;
      33             : #if defined(CONFIG_CPU_AARCH32_CORTEX_R)
      34             :         /* Region Size */
      35             :         uint32_t size;
      36             : #endif
      37             :         /* Region Attributes */
      38           0 :         arm_mpu_region_attr_t attr;
      39             : };
      40             : 
      41             : /* MPU configuration data structure */
      42           0 : struct arm_mpu_config {
      43             :         /* Number of regions */
      44           0 :         uint32_t num_regions;
      45             :         /* Regions */
      46           0 :         const struct arm_mpu_region *mpu_regions;
      47             : };
      48             : 
      49             : #if defined(CONFIG_ARMV7_R)
      50             : #define MPU_REGION_ENTRY(_name, _base, _size, _attr) \
      51             :         {\
      52             :                 .name = _name, \
      53             :                 .base = _base, \
      54             :                 .size = _size, \
      55             :                 .attr = _attr, \
      56             :         }
      57             : #else
      58           0 : #define MPU_REGION_ENTRY(_name, _base, _attr) \
      59             :         {\
      60             :                 .name = _name, \
      61             :                 .base = _base, \
      62             :                 .attr = _attr, \
      63             :         }
      64             : #endif
      65             : 
      66             : /* Reference to the MPU configuration.
      67             :  *
      68             :  * This struct is defined and populated for each SoC (in the SoC definition),
      69             :  * and holds the build-time configuration information for the fixed MPU
      70             :  * regions enabled during kernel initialization. Dynamic MPU regions (e.g.
      71             :  * for Thread Stack, Stack Guards, etc.) are programmed during runtime, thus,
      72             :  * not kept here.
      73             :  */
      74           0 : extern const struct arm_mpu_config mpu_config;
      75             : 
      76             : #endif /* _ASMLANGUAGE */
      77             : 
      78             : #endif /* ZEPHYR_INCLUDE_ARCH_ARM_MPU_ARM_MPU_H_ */

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