Line data    Source code

       1           0 : /*
       2             :  * Copyright 2022 NXP
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : #ifndef ZEPHYR_INCLUDE_ARCH_ARM64_ARM_MEM_H_
       7             : #define ZEPHYR_INCLUDE_ARCH_ARM64_ARM_MEM_H_
       8             : 
       9             : /*
      10             :  * Define ARM specific memory flags used by k_mem_map_phys_bare()
      11             :  * followed public definitions in include/kernel/mm.h.
      12             :  */
      13             : /* For ARM64, K_MEM_CACHE_NONE is nGnRnE. */
      14           0 : #define K_MEM_ARM_DEVICE_nGnRnE K_MEM_CACHE_NONE
      15             : 
      16             : /** ARM64 Specific flags: device memory with nGnRE */
      17           1 : #define K_MEM_ARM_DEVICE_nGnRE  3
      18             : 
      19             : /** ARM64 Specific flags: device memory with GRE */
      20           1 : #define K_MEM_ARM_DEVICE_GRE    4
      21             : 
      22             : /** ARM64 Specific flags: normal memory with Non-cacheable */
      23           1 : #define K_MEM_ARM_NORMAL_NC     5
      24             : 
      25             : #endif /* ZEPHYR_INCLUDE_ARCH_ARM64_ARM_MEM_H_ */