Line data Source code
1 0 : /*
2 : * Copyright (c) 2021 Intel Corporation
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : #ifndef ZEPHYR_INCLUDE_ARCH_RISCV_ARCH_INLINES_H_
8 : #define ZEPHYR_INCLUDE_ARCH_RISCV_ARCH_INLINES_H_
9 :
10 : #ifndef _ASMLANGUAGE
11 :
12 : #include <zephyr/kernel_structs.h>
13 : #include "csr.h"
14 :
15 0 : static ALWAYS_INLINE uint32_t arch_proc_id(void)
16 : {
17 : return csr_read(mhartid) & ((uintptr_t)CONFIG_RISCV_HART_MASK);
18 : }
19 :
20 0 : static ALWAYS_INLINE _cpu_t *arch_curr_cpu(void)
21 : {
22 : #if defined(CONFIG_SMP) || defined(CONFIG_USERSPACE)
23 : return (_cpu_t *)csr_read(mscratch);
24 : #else
25 : return &_kernel.cpus[0];
26 : #endif
27 : }
28 :
29 : #ifdef CONFIG_RISCV_CURRENT_VIA_GP
30 :
31 : register struct k_thread *__arch_current_thread __asm__("gp");
32 :
33 : #define arch_current_thread() __arch_current_thread
34 : #define arch_current_thread_set(thread) ({ __arch_current_thread = (thread); })
35 :
36 : #endif /* CONFIG_RISCV_CURRENT_VIA_GP */
37 :
38 0 : static ALWAYS_INLINE unsigned int arch_num_cpus(void)
39 : {
40 : return CONFIG_MP_MAX_NUM_CPUS;
41 : }
42 :
43 : #endif /* !_ASMLANGUAGE */
44 : #endif /* ZEPHYR_INCLUDE_ARCH_RISCV_ARCH_INLINES_H_ */
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