Line data    Source code

       1           1 : /*
       2             :  * Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
       3             :  * Copyright (c) 2018 Foundries.io Ltd
       4             :  *
       5             :  * SPDX-License-Identifier: Apache-2.0
       6             :  */
       7             : 
       8             : /**
       9             :  * @file
      10             :  * @brief RISCV public exception handling
      11             :  *
      12             :  * RISCV-specific kernel exception handling interface.
      13             :  */
      14             : 
      15             : #ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
      16             : #define ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
      17             : 
      18             : #ifndef _ASMLANGUAGE
      19             : #include <zephyr/types.h>
      20             : #include <zephyr/toolchain.h>
      21             : 
      22             : #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
      23             : #include <soc_context.h>
      24             : #endif
      25             : 
      26             : #ifdef CONFIG_RISCV_SOC_HAS_ISR_STACKING
      27             : #include <soc_isr_stacking.h>
      28             : #endif
      29             : 
      30             : #ifdef __cplusplus
      31             : extern "C" {
      32             : #endif
      33             : 
      34             : /*
      35             :  * The name of the structure which contains soc-specific state, if
      36             :  * any, as well as the soc_esf_t typedef below, are part of the RISC-V
      37             :  * arch API.
      38             :  *
      39             :  * The contents of the struct are provided by a SOC-specific
      40             :  * definition in soc_context.h.
      41             :  */
      42             : #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
      43             : struct soc_esf {
      44             :         SOC_ESF_MEMBERS;
      45             : };
      46             : #endif
      47             : 
      48             : #ifdef CONFIG_EXTRA_EXCEPTION_INFO
      49             : /* Forward declaration */
      50             : struct _callee_saved;
      51             : typedef struct _callee_saved _callee_saved_t;
      52             : #endif /* CONFIG_EXTRA_EXCEPTION_INFO */
      53             : 
      54             : #if defined(CONFIG_RISCV_SOC_HAS_ISR_STACKING)
      55             :         SOC_ISR_STACKING_ESF_DECLARE;
      56             : #else
      57             : struct arch_esf {
      58             :         unsigned long ra;               /* return address */
      59             : 
      60             :         unsigned long t0;               /* Caller-saved temporary register */
      61             :         unsigned long t1;               /* Caller-saved temporary register */
      62             :         unsigned long t2;               /* Caller-saved temporary register */
      63             : #if !defined(CONFIG_RISCV_ISA_RV32E)
      64             :         unsigned long t3;               /* Caller-saved temporary register */
      65             :         unsigned long t4;               /* Caller-saved temporary register */
      66             :         unsigned long t5;               /* Caller-saved temporary register */
      67             :         unsigned long t6;               /* Caller-saved temporary register */
      68             : #endif /* !CONFIG_RISCV_ISA_RV32E */
      69             : 
      70             :         unsigned long a0;               /* function argument/return value */
      71             :         unsigned long a1;               /* function argument */
      72             :         unsigned long a2;               /* function argument */
      73             :         unsigned long a3;               /* function argument */
      74           0 :         unsigned long a4;               /* function argument */
      75           0 :         unsigned long a5;               /* function argument */
      76             : #if !defined(CONFIG_RISCV_ISA_RV32E)
      77           0 :         unsigned long a6;               /* function argument */
      78           0 :         unsigned long a7;               /* function argument */
      79             : #endif /* !CONFIG_RISCV_ISA_RV32E */
      80             : 
      81           0 :         unsigned long mepc;             /* machine exception program counter */
      82           0 :         unsigned long mstatus;  /* machine status register */
      83             : 
      84           0 :         unsigned long s0;               /* callee-saved s0 */
      85             : 
      86             : #ifdef CONFIG_USERSPACE
      87           0 :         unsigned long sp;               /* preserved (user or kernel) stack pointer */
      88             : #endif
      89             : 
      90             : #ifdef CONFIG_EXTRA_EXCEPTION_INFO
      91             :         _callee_saved_t *csf;           /* pointer to callee-saved-registers */
      92             : #endif /* CONFIG_EXTRA_EXCEPTION_INFO */
      93             : 
      94             : #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
      95             :         struct soc_esf soc_context;
      96             : #endif
      97             : } __aligned(16);
      98             : #endif /* CONFIG_RISCV_SOC_HAS_ISR_STACKING */
      99             : 
     100             : #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
     101             : typedef struct soc_esf soc_esf_t;
     102             : #endif
     103             : 
     104             : #ifdef __cplusplus
     105             : }
     106             : #endif
     107             : 
     108             : #endif /* _ASMLANGUAGE */
     109             : 
     110             : #endif /* ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_ */