LCOV - code coverage report
Current view: top level - zephyr/arch/riscv - thread.h Coverage Total Hit
Test: new.info Lines: 50.0 % 2 1
Test Date: 2025-10-20 12:20:01

            Line data    Source code
       1            1 : /*
       2              :  * Copyright (c) 2017 Intel Corporation
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : /**
       8              :  * @file
       9              :  * @brief Per-arch thread definition
      10              :  *
      11              :  * This file contains definitions for
      12              :  *
      13              :  *  struct _thread_arch
      14              :  *  struct _callee_saved
      15              :  *
      16              :  * necessary to instantiate instances of struct k_thread.
      17              :  */
      18              : 
      19              : #ifndef ZEPHYR_INCLUDE_ARCH_RISCV_THREAD_H_
      20              : #define ZEPHYR_INCLUDE_ARCH_RISCV_THREAD_H_
      21              : 
      22              : #ifndef _ASMLANGUAGE
      23              : #include <zephyr/types.h>
      24              : 
      25              : /*
      26              :  * The following structure defines the list of registers that need to be
      27              :  * saved/restored when a context switch occurs.
      28              :  */
      29              : struct _callee_saved {
      30              :         unsigned long sp;       /* Stack pointer, (x2 register) */
      31              :         unsigned long ra;       /* return address */
      32              : 
      33              :         unsigned long s0;       /* saved register/frame pointer */
      34              :         unsigned long s1;       /* saved register */
      35              : #if !defined(CONFIG_RISCV_ISA_RV32E)
      36              :         unsigned long s2;       /* saved register */
      37              :         unsigned long s3;       /* saved register */
      38              :         unsigned long s4;       /* saved register */
      39              :         unsigned long s5;       /* saved register */
      40              :         unsigned long s6;       /* saved register */
      41              :         unsigned long s7;       /* saved register */
      42              :         unsigned long s8;       /* saved register */
      43              :         unsigned long s9;       /* saved register */
      44              :         unsigned long s10;      /* saved register */
      45              :         unsigned long s11;      /* saved register */
      46              : #endif
      47              : };
      48              : typedef struct _callee_saved _callee_saved_t;
      49              : 
      50              : #if !defined(RV_FP_TYPE)
      51              : #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
      52              : #define RV_FP_TYPE uint64_t
      53              : #else
      54            0 : #define RV_FP_TYPE uint32_t
      55              : #endif
      56              : #endif
      57              : 
      58              : struct z_riscv_fp_context {
      59              :         RV_FP_TYPE fa0, fa1, fa2, fa3, fa4, fa5, fa6, fa7;
      60              :         RV_FP_TYPE ft0, ft1, ft2, ft3, ft4, ft5, ft6, ft7, ft8, ft9, ft10, ft11;
      61              :         RV_FP_TYPE fs0, fs1, fs2, fs3, fs4, fs5, fs6, fs7, fs8, fs9, fs10, fs11;
      62              :         uint32_t fcsr;
      63              : };
      64              : typedef struct z_riscv_fp_context z_riscv_fp_context_t;
      65              : 
      66              : struct _thread_arch {
      67              : #ifdef CONFIG_FPU_SHARING
      68              :         struct z_riscv_fp_context saved_fp_context;
      69              :         bool fpu_recently_used;
      70              :         uint8_t exception_depth;
      71              : #endif
      72              : #ifdef CONFIG_USERSPACE
      73              :         unsigned long priv_stack_start;
      74              :         unsigned long u_mode_pmpaddr_regs[CONFIG_PMP_SLOTS];
      75              :         unsigned long u_mode_pmpcfg_regs[CONFIG_PMP_SLOTS / sizeof(unsigned long)];
      76              :         unsigned int u_mode_pmp_domain_offset;
      77              :         unsigned int u_mode_pmp_end_index;
      78              :         unsigned int u_mode_pmp_update_nr;
      79              : #endif
      80              : #ifdef CONFIG_PMP_STACK_GUARD
      81              :         unsigned int m_mode_pmp_end_index;
      82              :         unsigned long m_mode_pmpaddr_regs[CONFIG_PMP_SLOTS];
      83              :         unsigned long m_mode_pmpcfg_regs[CONFIG_PMP_SLOTS / sizeof(unsigned long)];
      84              : #endif
      85              : #if defined(CONFIG_CPP) && !defined(CONFIG_FPU_SHARING) && !defined(CONFIG_USERSPACE) &&           \
      86              :         !defined(CONFIG_PMP_STACK_GUARD)
      87              :         /* Empty struct has size 0 in C, size 1 in C++. Force them to be the same. */
      88              :         uint8_t unused_cpp_size_compatibility;
      89              : #endif
      90              : };
      91              : 
      92              : #if defined(CONFIG_CPP)
      93              : BUILD_ASSERT(sizeof(struct _thread_arch) >= 1);
      94              : #endif
      95              : 
      96              : typedef struct _thread_arch _thread_arch_t;
      97              : 
      98              : #endif /* _ASMLANGUAGE */
      99              : 
     100              : #endif /* ZEPHYR_INCLUDE_ARCH_RISCV_THREAD_H_ */
        

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