Line data    Source code

       1           1 : /*
       2             :  * Copyright (c) 2016 Linaro Limited.
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : 
       7             : #ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_
       8             : #define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_
       9             : 
      10             : #include <zephyr/drivers/clock_control.h>
      11             : 
      12             : /**
      13             :  * @file
      14             :  *
      15             :  * @brief Clock subsystem IDs for ARM family SoCs
      16             :  */
      17             : 
      18             : /* CMSDK BUS Mapping */
      19           0 : enum arm_bus_type_t {
      20             :         CMSDK_AHB = 0,
      21             :         CMSDK_APB,
      22             : };
      23             : 
      24             : /* CPU States */
      25           0 : enum arm_soc_state_t {
      26             :         SOC_ACTIVE = 0,
      27             :         SOC_SLEEP,
      28             :         SOC_DEEPSLEEP,
      29             : };
      30             : 
      31           0 : struct arm_clock_control_t {
      32             :         /* ARM family SoCs supported Bus types */
      33           0 :         enum arm_bus_type_t bus;
      34             :         /* Clock can be configured for 3 states: Active, Sleep, Deep Sleep */
      35           0 :         enum arm_soc_state_t state;
      36             :         /* Identifies the device on the bus */
      37           0 :         uint32_t device;
      38             : };
      39             : 
      40             : #endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_ */