Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2022 Teslabs Engineering S.L.
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_GD32_H_
       8              : #define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_GD32_H_
       9              : 
      10              : #include <zephyr/device.h>
      11              : 
      12              : /**
      13              :  * @brief Obtain a reference to the GD32 clock controller.
      14              :  *
      15              :  * There is a single clock controller in the GD32: cctl. The device can be
      16              :  * used without checking for it to be ready since it has no initialization
      17              :  * code subject to failures.
      18              :  */
      19            1 : #define GD32_CLOCK_CONTROLLER DEVICE_DT_GET(DT_NODELABEL(cctl))
      20              : 
      21              : #endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_GD32_H_ */