LCOV - code coverage report
Current view: top level - zephyr/drivers/clock_control - mchp_sam_pmc.h Coverage Total Hit
Test: new.info Lines: 0.0 % 20 0
Test Date: 2025-09-05 16:43:28

            Line data    Source code
       1            0 : /*
       2              :  * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_MICROCHIP_SAM_PMC_H_
       8              : #define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_MICROCHIP_SAM_PMC_H_
       9              : 
      10              : #include <soc.h>
      11              : #include <zephyr/drivers/clock_control.h>
      12              : #include <zephyr/dt-bindings/clock/microchip_sam_pmc.h>
      13              : 
      14            0 : struct sam_sckc_config {
      15            0 :         uint32_t crystal_osc: 1;
      16            0 :         uint32_t reserved: 31;
      17              : };
      18              : 
      19            0 : struct sam_clk_cfg {
      20            0 :         uint32_t clock_type;
      21            0 :         uint32_t clock_id;
      22              : };
      23              : 
      24              : /* Device constant configuration parameters */
      25            0 : struct sam_pmc_cfg {
      26            0 :         uint32_t *const reg;
      27            0 :         const struct device *td_slck;
      28            0 :         const struct device *md_slck;
      29            0 :         const struct device *main_xtal;
      30            0 :         const struct sam_sckc_config td_slck_cfg;
      31            0 :         const struct sam_sckc_config md_slck_cfg;
      32              : };
      33              : 
      34              : /* Device run time data */
      35            0 : struct sam_pmc_data {
      36            0 :         struct pmc_data *pmc;
      37              : };
      38              : 
      39            0 : #define SAM_DT_CLOCK_PMC_CFG(clock, node_id) {                                          \
      40              :                 .clock_type = DT_CLOCKS_CELL_BY_IDX(node_id,                            \
      41              :                                                     clock,                              \
      42              :                                                     clock_type),                        \
      43              :                 .clock_id = DT_CLOCKS_CELL_BY_IDX(node_id,                              \
      44              :                                                   clock,                                \
      45              :                                                   peripheral_id)                        \
      46              :         }
      47              : 
      48            0 : #define SAM_DT_INST_CLOCK_PMC_CFG(inst) SAM_DT_CLOCK_PMC_CFG(0, DT_DRV_INST(inst))
      49              : 
      50            0 : #define SAM_DT_CLOCKS_PMC_CFG(node_id) {                                                \
      51              :                 LISTIFY(DT_NUM_CLOCKS(node_id),                                         \
      52              :                 SAM_DT_CLOCK_PMC_CFG, (,), node_id)                                     \
      53              :         }
      54              : 
      55            0 : #define SAM_DT_INST_CLOCKS_PMC_CFG(inst) SAM_DT_CLOCKS_PMC_CFG(DT_DRV_INST(inst))
      56              : 
      57              : #endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_MICROCHIP_SAM_PMC_H_ */
        

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