Line data    Source code

       1           0 : /*
       2             :  * Copyright (c) 2023 Nuvoton Technology Corporation.
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : 
       7             : #ifndef __ZEPHYR_INCLUDE_DRIVERS_NPCX_FLASH_API_EX_H__
       8             : #define __ZEPHYR_INCLUDE_DRIVERS_NPCX_FLASH_API_EX_H__
       9             : 
      10             : #ifdef __cplusplus
      11             : extern "C" {
      12             : #endif
      13             : 
      14             : #include <zephyr/drivers/flash.h>
      15             : 
      16           0 : enum flash_npcx_ex_ops {
      17             :         /*
      18             :          * NPCX User Mode Access (UMA) mode execution.
      19             :          *
      20             :          * Execute a SPI transaction via User Mode Access (UMA) mode. Users can
      21             :          * perform a customized SPI transaction to gread or write the device's
      22             :          * configuration such as status registers of nor flash, power on/off,
      23             :          * and so on.
      24             :          */
      25             :         FLASH_NPCX_EX_OP_EXEC_UMA = FLASH_EX_OP_VENDOR_BASE,
      26             :         /*
      27             :          * NPCX Configure specific operation for Quad-SPI nor flash.
      28             :          *
      29             :          * It configures specific operation for Quad-SPI nor flash such as lock
      30             :          * or unlock UMA mode, set write protection pin of internal flash, and
      31             :          * so on.
      32             :          */
      33             :         FLASH_NPCX_EX_OP_SET_QSPI_OPER,
      34             :         /*
      35             :          * NPCX Get specific operation for Quad-SPI nor flash.
      36             :          *
      37             :          * It returns current specific operation for Quad-SPI nor flash.
      38             :          */
      39             :         FLASH_NPCX_EX_OP_GET_QSPI_OPER,
      40             : };
      41             : 
      42             : /* Structures used by FLASH_NPCX_EX_OP_EXEC_UMA */
      43           0 : struct npcx_ex_ops_uma_in {
      44           0 :         uint8_t opcode;
      45           0 :         uint8_t *tx_buf;
      46           0 :         size_t  tx_count;
      47           0 :         uint32_t addr;
      48           0 :         size_t  addr_count;
      49           0 :         size_t rx_count;
      50             : };
      51             : 
      52           0 : struct npcx_ex_ops_uma_out {
      53           0 :         uint8_t *rx_buf;
      54             : };
      55             : 
      56             : /* Structures used by FLASH_NPCX_EX_OP_SET_QSPI_OPER */
      57           0 : struct npcx_ex_ops_qspi_oper_in {
      58           0 :         bool enable;
      59           0 :         uint32_t mask;
      60             : };
      61             : 
      62             : /* Structures used by FLASH_NPCX_EX_OP_GET_QSPI_OPER */
      63           0 : struct npcx_ex_ops_qspi_oper_out {
      64           0 :         uint32_t oper;
      65             : };
      66             : 
      67             : /* Specific NPCX QSPI devices control bits */
      68           0 : #define NPCX_EX_OP_LOCK_UMA     BIT(0) /* Lock/Unlock UMA mode */
      69           0 : #define NPCX_EX_OP_INT_FLASH_WP BIT(1) /* Issue write protection of internal flash */
      70             : 
      71             : #ifdef __cplusplus
      72             : }
      73             : #endif
      74             : 
      75             : #endif /* __ZEPHYR_INCLUDE_DRIVERS_NPCX_FLASH_API_EX_H__ */