Line data Source code
1 1 : /*
2 : * Copyright (c) 2025 Realtek, SIBG-SD7
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : /**
8 : * @file
9 : * @brief Header file for Realtek RTS5912 flash extended operations.
10 : * @ingroup rts5912_flash_ex_op
11 : */
12 :
13 : #ifndef __ZEPHYR_INCLUDE_DRIVERS_RTS5912_FLASH_API_EX_H__
14 : #define __ZEPHYR_INCLUDE_DRIVERS_RTS5912_FLASH_API_EX_H__
15 :
16 : /**
17 : * @brief Extended operations for Realtek RTS5912 flash controller.
18 : * @defgroup rts5912_flash_ex_op Realtek RTS5912
19 : * @ingroup flash_ex_op
20 : * @{
21 : */
22 :
23 : /**
24 : * @brief Enumeration for Realtek RTS5912 flash extended operations.
25 : */
26 1 : enum flash_rts5912_ex_ops {
27 : /**
28 : * @brief Sends the Write Enable (WREN) command to the flash chip.
29 : *
30 : * This operation sets the Write Enable Latch (WEL) bit in the flash
31 : * memory's status register, allowing write and erase operations.
32 : *
33 : * @param in Not used.
34 : * @param out Not used.
35 : */
36 : FLASH_RTS5912_EX_OP_WR_ENABLE = FLASH_EX_OP_VENDOR_BASE,
37 :
38 : /**
39 : * @brief Sends the Write Disable (WRDI) command to the flash chip.
40 : *
41 : * This operation resets the Write Enable Latch (WEL) bit, protecting
42 : * the memory from being written or erased.
43 : *
44 : * @param in Not used.
45 : * @param out Not used.
46 : */
47 : FLASH_RTS5912_EX_OP_WR_DISABLE,
48 :
49 : /**
50 : * @brief Writes to the flash Status Register 1 (SR1).
51 : *
52 : * This operation writes a single byte to the main status register.
53 : *
54 : * @param in Not used.
55 : * @param out A pointer to a uint8_t containing the value to be written
56 : * to SR1.
57 : */
58 : FLASH_RTS5912_EX_OP_WR_SR,
59 :
60 : /**
61 : * @brief Writes to the flash Status Register 2 (SR2).
62 : *
63 : * This operation writes a single byte to the second status register.
64 : *
65 : * @param in Not used.
66 : * @param out A pointer to a uint8_t containing the value to be written
67 : * to SR2.
68 : */
69 : FLASH_RTS5912_EX_OP_WR_SR2,
70 :
71 : /**
72 : * @brief Reads the flash Status Register 1 (SR1).
73 : *
74 : * This operation reads a single byte from the main status register.
75 : *
76 : * @param in Not used.
77 : * @param out A pointer to a uint8_t buffer where the read value of
78 : * SR1 will be stored.
79 : */
80 : FLASH_RTS5912_EX_OP_RD_SR,
81 :
82 : /**
83 : * @brief Reads the flash Status Register 2 (SR2).
84 : *
85 : * This operation reads a single byte from the second status register.
86 : *
87 : * @param in Not used.
88 : * @param out A pointer to a uint8_t buffer where the read value of
89 : * SR2 will be stored.
90 : */
91 : FLASH_RTS5912_EX_OP_RD_SR2,
92 :
93 : /**
94 : * @brief Sets the hardware Write Protect (WP#) pin state.
95 : *
96 : * This operation controls the controller's hardware WP# pin output.
97 : *
98 : * @param in Not used.
99 : * @param out A pointer to a uint8_t. If the value is non-zero,
100 : * the WP# pin is asserted (active low). If zero, it is
101 : * de-asserted.
102 : */
103 : FLASH_RTS5912_EX_OP_SET_WP,
104 :
105 : /**
106 : * @brief Gets the hardware Write Protect (WP#) pin state.
107 : *
108 : * This operation reads the current state of the controller's
109 : * hardware WP# pin setting.
110 : *
111 : * @param in Not used.
112 : * @param out A pointer to a uint8_t buffer to store the current
113 : * WP# pin state. A non-zero value indicates the pin
114 : * is configured to be asserted.
115 : */
116 : FLASH_RTS5912_EX_OP_GET_WP,
117 : };
118 :
119 : /**
120 : * @}
121 : */
122 :
123 : #endif /* __ZEPHYR_INCLUDE_DRIVERS_RTS5912_FLASH_API_EX_H__ */
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