Line data Source code
1 0 : /*
2 : * Copyright (c) 2025 Intel Corporation
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : #ifndef __ZEPHYR_INCLUDE_MIC_PRIVACY_H__
8 : #define __ZEPHYR_INCLUDE_MIC_PRIVACY_H__
9 :
10 : #include <stdint.h>
11 : #include <errno.h>
12 : #include <stdbool.h>
13 : #include <stdint.h>
14 : #include <zephyr/kernel.h>
15 : #include <zephyr/spinlock.h>
16 : #include <zephyr/devicetree.h>
17 :
18 0 : enum mic_privacy_policy {
19 : MIC_PRIVACY_DISABLED = 0,
20 : MIC_PRIVACY_HW_MANAGED = 1,
21 : MIC_PRIVACY_FW_MANAGED = 2,
22 : MIC_PRIVACY_FORCE_MIC_DISABLED = 3,
23 : };
24 :
25 : /* has to match HW register definition
26 : * (DZLS bit field in DFMICPVCP register)
27 : */
28 0 : union mic_privacy_mask {
29 0 : uint32_t value;
30 : struct {
31 0 : uint32_t sndw:7;
32 0 : uint32_t dmic:1;
33 0 : };
34 : };
35 :
36 0 : struct intel_adsp_mic_priv_data {
37 0 : uint8_t rsvd;
38 : };
39 :
40 0 : struct intel_adsp_mic_priv_cfg {
41 0 : uint32_t base;
42 0 : uint32_t regblock_size;
43 : };
44 :
45 0 : struct mic_privacy_api_funcs {
46 0 : void (*enable_fw_managed_irq)(bool enable_irq, const void *fn);
47 0 : void (*clear_fw_managed_irq)();
48 0 : void (*enable_dmic_irq)(bool enable_irq, const void *fn);
49 0 : bool (*get_dmic_irq_status)(void);
50 0 : void (*clear_dmic_irq_status)(void);
51 : enum mic_privacy_policy (*get_policy)();
52 0 : uint32_t (*get_privacy_policy_register_raw_value)();
53 0 : uint32_t (*get_dma_data_zeroing_wait_time)();
54 0 : uint32_t (*get_dma_data_zeroing_link_select)();
55 0 : uint32_t (*get_dmic_mic_disable_status)(void);
56 0 : uint32_t (*get_fw_managed_mic_disable_status)();
57 0 : void (*set_fw_managed_mode)(bool is_fw_managed_enabled);
58 0 : void (*set_fw_mic_disable_status)(bool fw_mic_disable_status);
59 0 : uint32_t (*get_fw_mic_disable_status)();
60 : };
61 :
62 : #endif
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