Line data    Source code

       1            0 : /*
       2              :  * Copyright 2023,2025 NXP
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : #ifndef ZEPHYR_INCLUDE_DRIVERS_MIPI_DSI_MCUX_2L_
       7              : #define ZEPHYR_INCLUDE_DRIVERS_MIPI_DSI_MCUX_2L_
       8              : 
       9              : /*
      10              :  * HW specific flag- indicates to the MIPI DSI 2L peripheral that the
      11              :  * data being sent is framebuffer data, which the DSI peripheral may
      12              :  * byte swap depending on KConfig settings
      13              :  */
      14            0 : #define MCUX_DSI_2L_FB_DATA BIT(0x1)
      15              : 
      16              : /*
      17              :  * HW specific flag - user set this bit in message flag and after the
      18              :  * transfer bus will enter ULPS.
      19              :  */
      20            0 : #define MCUX_DSI_2L_ULPS BIT(0x2)
      21              : 
      22              : #endif /* ZEPHYR_INCLUDE_DRIVERS_MIPI_DSI_MCUX_2L_ */