Line data Source code
1 0 : /*
2 : * Copyright 2022-2025 NXP
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : #ifndef ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_SIUL2_COMMON_H_
8 : #define ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_SIUL2_COMMON_H_
9 :
10 : #include <zephyr/devicetree.h>
11 : #include <zephyr/types.h>
12 :
13 : /** @cond INTERNAL_HIDDEN */
14 :
15 : struct pinctrl_soc_reg {
16 : uint8_t inst;
17 : uint16_t idx;
18 : uint32_t val;
19 : };
20 :
21 : /** @brief Type for NXP SIUL2 pin configuration. */
22 : typedef struct {
23 : struct pinctrl_soc_reg mscr;
24 : struct pinctrl_soc_reg imcr;
25 : } pinctrl_soc_pin_t;
26 :
27 : /**
28 : * @brief Utility macro to initialize each pin.
29 : *
30 : *
31 : * @param group Group node identifier.
32 : * @param prop Property name.
33 : * @param idx Property entry index.
34 : */
35 : #define Z_PINCTRL_STATE_PIN_INIT(group, prop, idx) \
36 : {NXP_SIUL2_PINMUX_INIT(group, DT_PROP_BY_IDX(group, prop, idx))},
37 :
38 : /**
39 : * @brief Utility macro to initialize state pins contained in a given property.
40 : *
41 : * @param node_id Node identifier.
42 : * @param prop Property name describing state pins.
43 : */
44 : #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
45 : { \
46 : DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, pinmux, \
47 : Z_PINCTRL_STATE_PIN_INIT) \
48 : }
49 :
50 : /** @endcond */
51 :
52 : #endif /* ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_NXP_SIUL2_COMMON_H_ */
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