Line data    Source code

       1            1 : /*
       2              :  * Copyright (c) 2021 Basalte bv
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : /**
       8              :  * @file
       9              :  * @brief Real-time clock control based on the MCUX IMX SNVS counter API.
      10              :  *
      11              :  * The core Zephyr API to this device is as a counter.
      12              :  *
      13              :  * Additional implementation details a user should take into account:
      14              :  * * an optional SRTC can be enabled (default) with configuration
      15              :  *   options
      16              :  * * the high power channel (id 0) is always available, the low power
      17              :  *   channel (id 1) is optional
      18              :  * * the low power alarm can be used to assert a wake-up
      19              :  * * the counter has a fixed 1Hz period
      20              :  */
      21              : #ifndef ZEPHYR_INCLUDE_DRIVERS_RTC_MCUX_SNVS_H_
      22              : #define ZEPHYR_INCLUDE_DRIVERS_RTC_MCUX_SNVS_H_
      23              : 
      24              : #include <zephyr/device.h>
      25              : 
      26              : #ifdef __cplusplus
      27              : extern "C" {
      28              : #endif
      29              : 
      30              : /** @brief Set the current counter value
      31              :  *
      32              :  * As the counter advances at 1Hz this will usually be set to the
      33              :  * current UNIX time stamp.
      34              :  *
      35              :  * @param dev the IMX SNVS RTC device pointer.
      36              :  *
      37              :  * @param ticks the new value of the internal counter
      38              :  *
      39              :  * @retval non-negative on success
      40              :  */
      41            1 : int mcux_snvs_rtc_set(const struct device *dev, uint32_t ticks);
      42              : 
      43              : #ifdef __cplusplus
      44              : }
      45              : #endif
      46              : 
      47              : #endif /* ZEPHYR_INCLUDE_DRIVERS_RTC_MCUX_SNVS_H_ */