LCOV - code coverage report
Current view: top level - zephyr/drivers/serial - uart_ifx_cat1.h Coverage Total Hit
Test: new.info Lines: 0.0 % 4 0
Test Date: 2025-09-05 20:47:19

            Line data    Source code
       1            0 : /*
       2              :  * Copyright (c) 2025 Cypress Semiconductor Corporation (an Infineon company) or
       3              :  * an affiliate of Cypress Semiconductor Corporation
       4              :  *
       5              :  * SPDX-License-Identifier: Apache-2.0
       6              :  */
       7              : 
       8              : #include <zephyr/drivers/uart.h>
       9              : #include <string.h>
      10              : #include <cy_scb_uart.h>
      11              : #include <cy_gpio.h>
      12              : #include <cy_syslib.h>
      13              : #include <cy_sysint.h>
      14              : 
      15              : #define _IFX_CAT1_SCB_BLOCK_ID_INVALID (0xFF)
      16              : 
      17              : #if (CY_CPU_CORTEX_M0P != 0)
      18              : #define IFX_CAT1_ISR_PRIORITY_DEFAULT (3)
      19              : #else
      20            0 : #define IFX_CAT1_ISR_PRIORITY_DEFAULT (7)
      21              : #endif /* (CY_CPU_CORTEX_M0P != 0) */
      22              : 
      23            0 : #define IFX_CAT1_IRQ_MUXING (CY_CPU_CORTEX_M0P || CPUSS_SYSTEM_IRQ_PRESENT)
      24              : 
      25            0 : #define IFX_CAT1_IRQ_LEGACY_M0 (CY_CPU_CORTEX_M0P && (1u == CY_IP_M4CPUSS_VERSION))
      26              : 
      27              : #if (IFX_CAT1_IRQ_MUXING)
      28              : static inline void _ifx_cat1_irq_set_priority(cy_en_intr_t system_irq, uint8_t intr_priority)
      29              : #else
      30              : static inline void _ifx_cat1_irq_set_priority(IRQn_Type system_irq, uint8_t intr_priority)
      31              : #endif
      32              : {
      33              : #if IFX_CAT1_IRQ_MUXING
      34              : #if IFX_CAT1_IRQ_LEGACY_M0
      35              :         IRQn_Type irqn = _ifx_cat1_irq_find_cm0(system_irq);
      36              :         uint8_t priority_to_set = intr_priority;
      37              : #else /* CM0+ on CPUSSv2, or CM4/CM7 on CPUSSv2 with SYSTEM_IRQ_PRESENT */
      38              :         IRQn_Type irqn = Cy_SysInt_GetNvicConnection(system_irq);
      39              : 
      40              :         _ifx_cat1_system_irq_store_priority(system_irq, intr_priority);
      41              :         uint8_t priority_to_set = _ifx_cat1_system_irq_lowest_priority(irqn);
      42              : #endif
      43              : #else
      44              :         IRQn_Type irqn = system_irq;
      45              :         uint8_t priority_to_set = intr_priority;
      46              : #endif
      47              :         NVIC_SetPriority(irqn, priority_to_set);
      48              : }
      49              : 
      50              : #if (IFX_CAT1_IRQ_MUXING)
      51              : cy_rslt_t _ifx_cat1_irq_register(cy_en_intr_t system_intr, uint8_t intr_priority,
      52              :                                  cy_israddress irq_handler);
      53              : #else
      54              : cy_rslt_t _ifx_cat1_irq_register(IRQn_Type system_intr, uint8_t intr_priority,
      55              :                                  cy_israddress irq_handler);
      56              : #endif
      57              : 
      58              : #if (IFX_CAT1_IRQ_MUXING)
      59              : void _ifx_cat1_irq_enable(cy_en_intr_t system_irq);
      60              : #else
      61              : void _ifx_cat1_irq_enable(IRQn_Type system_irq);
      62              : #endif
      63              : 
      64              : /* Offset for implementation-defined ISR type numbers (IRQ0 = 16) */
      65              : #define _IFX_CAT1_UTILS_IRQN_OFFSET (16U)
      66              : 
      67              : /* Macro to get the IRQn of the current ISR */
      68              : #define _IFX_CAT1_UTILS_GET_CURRENT_IRQN() ((IRQn_Type)(__get_IPSR() - _IFX_CAT1_UTILS_IRQN_OFFSET))
      69              : 
      70              : #if (IFX_CAT1_IRQ_MUXING)
      71              : static inline cy_en_intr_t _ifx_cat1_irq_get_active(void)
      72              : #else
      73              : static inline IRQn_Type _ifx_cat1_irq_get_active(void)
      74              : #endif
      75              : {
      76              :         IRQn_Type irqn = _IFX_CAT1_UTILS_GET_CURRENT_IRQN();
      77              : #if IFX_CAT1_IRQ_MUXING
      78              : #if IFX_CAT1_IRQ_LEGACY_M0
      79              :         /* No pre-built functionality for this. Need to see what CPU interrupt is active, then
      80              :          * indirect through the NVIC mux to figure out what system IRQ it is mapped to.
      81              :          */
      82              :         return Cy_SysInt_GetInterruptSource(irqn);
      83              : #else /* CM0+ on CPUSSv2, or CM4/CM7 on CPUSSv2 with SYSTEM_IRQ_PRESENT */
      84              :         return Cy_SysInt_GetInterruptActive(irqn);
      85              : #endif
      86              : #else
      87              :         return irqn;
      88              : #endif
      89              : }
        

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