Line data    Source code

       1           0 : /*
       2             :  * Copyright (c) 2024 Michael Hope
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : 
       7             : #ifndef __CH32V00X_CLOCKS_H__
       8             : #define __CH32V00X_CLOCKS_H__
       9             : 
      10           0 : #define CH32V00X_AHB_PCENR_OFFSET  0
      11           0 : #define CH32V00X_APB2_PCENR_OFFSET 1
      12           0 : #define CH32V00X_APB1_PCENR_OFFSET 2
      13             : 
      14           0 : #define CH32V00X_CLOCK_CONFIG(bus, bit) (((CH32V00X_##bus##_PCENR_OFFSET) << 5) | (bit))
      15             : 
      16           0 : #define CH32V00X_CLOCK_DMA1  CH32V00X_CLOCK_CONFIG(AHB, 0)
      17           0 : #define CH32V00X_CLOCK_SRAM  CH32V00X_CLOCK_CONFIG(AHB, 2)
      18           0 : #define CH32V00X_CLOCK_FLITF CH32V00X_CLOCK_CONFIG(AHB, 4)
      19           0 : #define CH32V00X_CLOCK_CRC   CH32V00X_CLOCK_CONFIG(AHB, 6)
      20           0 : #define CH32V00X_CLOCK_USB   CH32V00X_CLOCK_CONFIG(AHB, 12)
      21             : 
      22           0 : #define CH32V00X_CLOCK_AFIO   CH32V00X_CLOCK_CONFIG(APB2, 0)
      23           0 : #define CH32V00X_CLOCK_IOPA   CH32V00X_CLOCK_CONFIG(APB2, 2)
      24           0 : #define CH32V00X_CLOCK_IOPB   CH32V00X_CLOCK_CONFIG(APB2, 3)
      25           0 : #define CH32V00X_CLOCK_IOPC   CH32V00X_CLOCK_CONFIG(APB2, 4)
      26           0 : #define CH32V00X_CLOCK_IOPD   CH32V00X_CLOCK_CONFIG(APB2, 5)
      27           0 : #define CH32V00X_CLOCK_ADC1   CH32V00X_CLOCK_CONFIG(APB2, 9)
      28           0 : #define CH32V00X_CLOCK_ADC2   CH32V00X_CLOCK_CONFIG(APB2, 10)
      29           0 : #define CH32V00X_CLOCK_TIM1   CH32V00X_CLOCK_CONFIG(APB2, 11)
      30           0 : #define CH32V00X_CLOCK_SPI1   CH32V00X_CLOCK_CONFIG(APB2, 12)
      31           0 : #define CH32V00X_CLOCK_USART1 CH32V00X_CLOCK_CONFIG(APB2, 14)
      32             : 
      33           0 : #define CH32V00X_CLOCK_TIM2   CH32V00X_CLOCK_CONFIG(APB1, 0)
      34           0 : #define CH32V00X_CLOCK_TIM3   CH32V00X_CLOCK_CONFIG(APB1, 1)
      35           0 : #define CH32V00X_CLOCK_WWDG   CH32V00X_CLOCK_CONFIG(APB1, 11)
      36           0 : #define CH32V00X_CLOCK_USART2 CH32V00X_CLOCK_CONFIG(APB1, 17)
      37           0 : #define CH32V00X_CLOCK_I2C1   CH32V00X_CLOCK_CONFIG(APB1, 21)
      38           0 : #define CH32V00X_CLOCK_BKP    CH32V00X_CLOCK_CONFIG(APB1, 27)
      39           0 : #define CH32V00X_CLOCK_PWR    CH32V00X_CLOCK_CONFIG(APB1, 28)
      40           0 : #define CH32V00X_CLOCK_USB    CH32V00X_CLOCK_CONFIG(APB1, 23)
      41             : 
      42             : #endif