Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32H2_H_
       8              : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32H2_H_
       9              : 
      10              : /* Supported CPU clock Sources */
      11            0 : #define ESP32_CPU_CLK_SRC_XTAL      0U
      12            0 : #define ESP32_CPU_CLK_SRC_PLL       1U
      13            0 : #define ESP32_CLK_SRC_RC_FAST       2U
      14            0 : #define ESP32_CPU_CLK_SRC_FLASH_PLL 3U
      15              : 
      16              : /* Supported CPU frequencies */
      17            0 : #define ESP32_CLK_CPU_PLL_48M       48000000
      18            0 : #define ESP32_CLK_CPU_FLASH_PLL_64M 64000000
      19            0 : #define ESP32_CLK_CPU_PLL_96M       96000000
      20            0 : #define ESP32_CLK_CPU_RC_FAST_FREQ  8500000
      21              : 
      22              : /* Supported XTAL Frequencies */
      23            0 : #define ESP32_CLK_XTAL_32M 32000000
      24              : 
      25              : /* Supported RTC fast clock sources */
      26            0 : #define ESP32_RTC_FAST_CLK_SRC_RC_FAST 0
      27            0 : #define ESP32_RTC_FAST_CLK_SRC_XTAL_D2 1
      28              : 
      29              : /* Supported RTC slow clock frequencies */
      30            0 : #define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW 0
      31            0 : #define ESP32_RTC_SLOW_CLK_SRC_XTAL32K 1
      32            0 : #define ESP32_RTC_SLOW_CLK_SRC_RC32K   2
      33            0 : #define ESP32_RTC_SLOW_CLK_32K_EXT_OSC 9
      34              : 
      35              : /* RTC slow clock frequencies */
      36            0 : #define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ 136000
      37            0 : #define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ 32768
      38            0 : #define ESP32_RTC_SLOW_CLK_SRC_RC32K_FREQ   32768
      39              : 
      40              : /* Modules IDs
      41              :  * These IDs are actually offsets in CLK and RST Control registers.
      42              :  * These IDs shouldn't be changed unless there is a Hardware change
      43              :  * from Espressif.
      44              :  *
      45              :  * Basic Modules
      46              :  * Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG
      47              :  */
      48            0 : #define ESP32_LEDC_MODULE                0
      49            0 : #define ESP32_UART0_MODULE               1
      50            0 : #define ESP32_UART1_MODULE               2
      51            0 : #define ESP32_USB_DEVICE_MODULE          3
      52            0 : #define ESP32_I2C0_MODULE                4
      53            0 : #define ESP32_I2C1_MODULE                5
      54            0 : #define ESP32_I2S1_MODULE                6
      55            0 : #define ESP32_TIMG0_MODULE               7
      56            0 : #define ESP32_TIMG1_MODULE               8
      57            0 : #define ESP32_UHCI0_MODULE               9
      58            0 : #define ESP32_RMT_MODULE                 10
      59            0 : #define ESP32_PCNT_MODULE                11
      60            0 : #define ESP32_SPI_MODULE                 12
      61            0 : #define ESP32_SPI2_MODULE                13
      62            0 : #define ESP32_TWAI0_MODULE               14
      63            0 : #define ESP32_RNG_MODULE                 15
      64            0 : #define ESP32_RSA_MODULE                 16
      65            0 : #define ESP32_AES_MODULE                 17
      66            0 : #define ESP32_SHA_MODULE                 18
      67            0 : #define ESP32_ECC_MODULE                 19
      68            0 : #define ESP32_HMAC_MODULE                20
      69            0 : #define ESP32_DS_MODULE                  21
      70            0 : #define ESP32_ECDSA_MODULE               22
      71            0 : #define ESP32_GDMA_MODULE                23
      72            0 : #define ESP32_MCPWM0_MODULE              24
      73            0 : #define ESP32_ETM_MODULE                 25
      74            0 : #define ESP32_PARLIO_MODULE              26
      75            0 : #define ESP32_SYSTIMER_MODULE            27
      76            0 : #define ESP32_SARADC_MODULE              28
      77            0 : #define ESP32_TEMPSENSOR_MODULE          29
      78            0 : #define ESP32_REGDMA_MODULE              30
      79              : /* Peripherals clock managed by the modem_clock driver must be listed last */
      80            0 : #define ESP32_BT_MODULE                  31
      81            0 : #define ESP32_IEEE802154_MODULE          32
      82            0 : #define ESP32_COEX_MODULE                33
      83            0 : #define ESP32_PHY_MODULE                 34
      84            0 : #define ESP32_ANA_I2C_MASTER_MODULE      35
      85            0 : #define ESP32_MODEM_ETM_MODULE           36
      86            0 : #define ESP32_MODEM_ADC_COMMON_FE_MODULE 37
      87            0 : #define ESP32_MODULE_MAX                 38
      88              : 
      89              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32H2_H_ */