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1 0 : /* 2 : * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. 3 : * 4 : * SPDX-License-Identifier: Apache-2.0 5 : */ 6 : 7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S2_H_ 8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S2_H_ 9 : 10 : /* Supported CPU clock Sources */ 11 0 : #define ESP32_CPU_CLK_SRC_XTAL 0U 12 0 : #define ESP32_CPU_CLK_SRC_PLL 1U 13 0 : #define ESP32_CLK_SRC_RC_FAST 2U 14 0 : #define ESP32_CLK_SRC_APLL_CLK 3U 15 : 16 : /* Supported PLL CPU frequencies */ 17 0 : #define ESP32_CLK_CPU_PLL_80M 80000000 18 0 : #define ESP32_CLK_CPU_PLL_160M 160000000 19 0 : #define ESP32_CLK_CPU_PLL_240M 240000000 20 0 : #define ESP32_CLK_CPU_RC_FAST_FREQ 8500000 21 : 22 : /* Supported XTAL frequencies */ 23 0 : #define ESP32_CLK_XTAL_40M 40000000 24 : 25 : /* Supported RTC fast clock sources */ 26 0 : #define ESP32_RTC_FAST_CLK_SRC_XTAL_D4 0 27 0 : #define ESP32_RTC_FAST_CLK_SRC_RC_FAST 1 28 : 29 : /* Supported RTC slow clock sources */ 30 0 : #define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW 0 31 0 : #define ESP32_RTC_SLOW_CLK_SRC_XTAL32K 1 32 0 : #define ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256 2 33 0 : #define ESP32_RTC_SLOW_CLK_32K_EXT_OSC 9 34 : 35 : /* RTC slow clock frequencies */ 36 0 : #define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ 90000 37 0 : #define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ 32768 38 0 : #define ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256_FREQ 33203 39 : 40 : /* Modules IDs 41 : * These IDs are actually offsets in CLK and RST Control registers. 42 : * These IDs shouldn't be changed unless there is a Hardware change 43 : * from Espressif. 44 : * 45 : * Basic Modules 46 : * Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG 47 : */ 48 0 : #define ESP32_LEDC_MODULE 0 49 0 : #define ESP32_UART0_MODULE 1 50 0 : #define ESP32_UART1_MODULE 2 51 0 : #define ESP32_USB_MODULE 3 52 0 : #define ESP32_I2C0_MODULE 4 53 0 : #define ESP32_I2C1_MODULE 5 54 0 : #define ESP32_I2S0_MODULE 6 55 0 : #define ESP32_TIMG0_MODULE 7 56 0 : #define ESP32_TIMG1_MODULE 8 57 0 : #define ESP32_UHCI0_MODULE 9 58 0 : #define ESP32_UHCI1_MODULE 10 59 0 : #define ESP32_RMT_MODULE 11 60 0 : #define ESP32_PCNT_MODULE 12 61 0 : #define ESP32_SPI_MODULE 13 62 0 : #define ESP32_FSPI_MODULE 14 63 0 : #define ESP32_HSPI_MODULE 15 64 0 : #define ESP32_SPI2_DMA_MODULE 16 65 0 : #define ESP32_SPI3_DMA_MODULE 17 66 0 : #define ESP32_TWAI_MODULE 18 67 0 : #define ESP32_RNG_MODULE 19 68 0 : #define ESP32_WIFI_MODULE 20 69 0 : #define ESP32_WIFI_BT_COMMON_MODULE 21 70 0 : #define ESP32_SYSTIMER_MODULE 22 71 0 : #define ESP32_AES_MODULE 23 72 0 : #define ESP32_SHA_MODULE 24 73 0 : #define ESP32_RSA_MODULE 25 74 0 : #define ESP32_CRYPTO_DMA_MODULE 26 75 0 : #define ESP32_AES_DMA_MODULE 27 76 0 : #define ESP32_SHA_DMA_MODULE 28 77 0 : #define ESP32_DEDIC_GPIO_MODULE 29 78 0 : #define ESP32_PERIPH_SARADC_MODULE 30 79 0 : #define ESP32_MODULE_MAX 31 80 : 81 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S2_H_ */