Line data Source code
1 0 : /* 2 : * Copyright (c) 2024 Nuvoton Technology Corporation. 3 : * 4 : * SPDX-License-Identifier: Apache-2.0 5 : */ 6 : 7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NUMAKER_M2L31_CLOCK_H 8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NUMAKER_M2L31_CLOCK_H 9 : 10 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_HXT 0x00000000 11 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_LXT 0x00000001 12 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_PLL 0x00000002 13 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_LIRC 0x00000003 14 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_MIRC 0x00000005 15 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_HIRC48M 0x00000006 16 0 : #define NUMAKER_CLK_CLKSEL0_HCLKSEL_HIRC 0x00000007 17 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_HXT 0x00000000 18 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_LXT 0x00000001 19 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_PLL 0x00000002 20 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_LIRC 0x00000003 21 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_MIRC 0x00000005 22 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_HIRC48M 0x00000006 23 0 : #define NUMAKER_CLK_CLKSEL0_HCLK0SEL_HIRC 0x00000007 24 0 : #define NUMAKER_CLK_CLKSEL0_STCLKSEL_HXT 0x00000000 25 0 : #define NUMAKER_CLK_CLKSEL0_STCLKSEL_LXT 0x00000008 26 0 : #define NUMAKER_CLK_CLKSEL0_STCLKSEL_HXT_DIV2 0x00000010 27 0 : #define NUMAKER_CLK_CLKSEL0_STCLKSEL_HCLK_DIV2 0x00000018 28 0 : #define NUMAKER_CLK_CLKSEL0_STCLKSEL_HIRC_DIV2 0x00000038 29 0 : #define NUMAKER_CLK_CLKSEL0_HCLK1SEL_HIRC 0x00000000 30 0 : #define NUMAKER_CLK_CLKSEL0_HCLK1SEL_MIRC 0x00001000 31 0 : #define NUMAKER_CLK_CLKSEL0_HCLK1SEL_LXT 0x00002000 32 0 : #define NUMAKER_CLK_CLKSEL0_HCLK1SEL_LIRC 0x00003000 33 0 : #define NUMAKER_CLK_CLKSEL0_HCLK1SEL_HIRC48M_DIV2 0x00004000 34 0 : #define NUMAKER_CLK_CLKSEL0_USBSEL_HIRC48M 0x00000000 35 0 : #define NUMAKER_CLK_CLKSEL0_USBSEL_PLL 0x00000100 36 0 : #define NUMAKER_CLK_CLKSEL0_EADC0SEL_PLL 0x00000400 37 0 : #define NUMAKER_CLK_CLKSEL0_EADC0SEL_HCLK 0x00000800 38 0 : #define NUMAKER_CLK_CLKSEL0_EADC0SEL_HCLK0 0x00000800 39 0 : #define NUMAKER_CLK_CLKSEL0_EADC0SEL_HIRC 0x00000C00 40 0 : #define NUMAKER_CLK_CLKSEL0_CANFD0SEL_HXT 0x00000000 41 0 : #define NUMAKER_CLK_CLKSEL0_CANFD0SEL_HIRC48M 0x01000000 42 0 : #define NUMAKER_CLK_CLKSEL0_CANFD0SEL_HCLK 0x02000000 43 0 : #define NUMAKER_CLK_CLKSEL0_CANFD0SEL_HCLK0 0x02000000 44 0 : #define NUMAKER_CLK_CLKSEL0_CANFD0SEL_HIRC 0x03000000 45 0 : #define NUMAKER_CLK_CLKSEL0_CANFD1SEL_HXT 0x00000000 46 0 : #define NUMAKER_CLK_CLKSEL0_CANFD1SEL_HIRC48M 0x04000000 47 0 : #define NUMAKER_CLK_CLKSEL0_CANFD1SEL_HCLK 0x08000000 48 0 : #define NUMAKER_CLK_CLKSEL0_CANFD1SEL_HCLK0 0x08000000 49 0 : #define NUMAKER_CLK_CLKSEL0_CANFD1SEL_HIRC 0x0C000000 50 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_HXT 0x00000000 51 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_LXT 0x00000010 52 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_HCLK 0x00000020 53 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_HCLK0 0x00000020 54 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_HIRC 0x00000030 55 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_LIRC 0x00000040 56 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_HIRC48M 0x00000050 57 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_PLL 0x00000060 58 0 : #define NUMAKER_CLK_CLKSEL1_CLKOSEL_MIRC 0x00000070 59 0 : #define NUMAKER_CLK_CLKSEL1_TMR0SEL_HXT 0x00000000 60 0 : #define NUMAKER_CLK_CLKSEL1_TMR0SEL_LXT 0x00000100 61 0 : #define NUMAKER_CLK_CLKSEL1_TMR0SEL_PCLK0 0x00000200 62 0 : #define NUMAKER_CLK_CLKSEL1_TMR0SEL_EXT 0x00000300 63 0 : #define NUMAKER_CLK_CLKSEL1_TMR0SEL_LIRC 0x00000500 64 0 : #define NUMAKER_CLK_CLKSEL1_TMR0SEL_HIRC 0x00000700 65 0 : #define NUMAKER_CLK_CLKSEL1_TMR1SEL_HXT 0x00000000 66 0 : #define NUMAKER_CLK_CLKSEL1_TMR1SEL_LXT 0x00001000 67 0 : #define NUMAKER_CLK_CLKSEL1_TMR1SEL_PCLK0 0x00002000 68 0 : #define NUMAKER_CLK_CLKSEL1_TMR1SEL_EXT 0x00003000 69 0 : #define NUMAKER_CLK_CLKSEL1_TMR1SEL_LIRC 0x00005000 70 0 : #define NUMAKER_CLK_CLKSEL1_TMR1SEL_HIRC 0x00007000 71 0 : #define NUMAKER_CLK_CLKSEL1_TMR2SEL_HXT 0x00000000 72 0 : #define NUMAKER_CLK_CLKSEL1_TMR2SEL_LXT 0x00010000 73 0 : #define NUMAKER_CLK_CLKSEL1_TMR2SEL_PCLK1 0x00020000 74 0 : #define NUMAKER_CLK_CLKSEL1_TMR2SEL_EXT 0x00030000 75 0 : #define NUMAKER_CLK_CLKSEL1_TMR2SEL_LIRC 0x00050000 76 0 : #define NUMAKER_CLK_CLKSEL1_TMR2SEL_HIRC 0x00070000 77 0 : #define NUMAKER_CLK_CLKSEL1_TMR3SEL_HXT 0x00000000 78 0 : #define NUMAKER_CLK_CLKSEL1_TMR3SEL_LXT 0x00100000 79 0 : #define NUMAKER_CLK_CLKSEL1_TMR3SEL_PCLK1 0x00200000 80 0 : #define NUMAKER_CLK_CLKSEL1_TMR3SEL_EXT 0x00300000 81 0 : #define NUMAKER_CLK_CLKSEL1_TMR3SEL_LIRC 0x00500000 82 0 : #define NUMAKER_CLK_CLKSEL1_TMR3SEL_HIRC 0x00700000 83 0 : #define NUMAKER_CLK_CLKSEL1_WWDTSEL_HCLK_DIV2048 0x80000000 84 0 : #define NUMAKER_CLK_CLKSEL1_WWDTSEL_HCLK0_DIV2048 0x80000000 85 0 : #define NUMAKER_CLK_CLKSEL1_WWDTSEL_LIRC 0xC0000000 86 0 : #define NUMAKER_CLK_CLKSEL2_EPWM0SEL_HCLK 0x00000000 87 0 : #define NUMAKER_CLK_CLKSEL2_EPWM0SEL_HCLK0 0x00000000 88 0 : #define NUMAKER_CLK_CLKSEL2_EPWM0SEL_PCLK0 0x00000001 89 0 : #define NUMAKER_CLK_CLKSEL2_EPWM1SEL_HCLK 0x00000000 90 0 : #define NUMAKER_CLK_CLKSEL2_EPWM1SEL_HCLK0 0x00000000 91 0 : #define NUMAKER_CLK_CLKSEL2_EPWM1SEL_PCLK1 0x00000002 92 0 : #define NUMAKER_CLK_CLKSEL2_QSPI0SEL_HXT 0x00000000 93 0 : #define NUMAKER_CLK_CLKSEL2_QSPI0SEL_PLL 0x00000004 94 0 : #define NUMAKER_CLK_CLKSEL2_QSPI0SEL_PCLK0 0x00000008 95 0 : #define NUMAKER_CLK_CLKSEL2_QSPI0SEL_HIRC 0x0000000C 96 0 : #define NUMAKER_CLK_CLKSEL2_SPI0SEL_HXT 0x00000000 97 0 : #define NUMAKER_CLK_CLKSEL2_SPI0SEL_PLL 0x00000010 98 0 : #define NUMAKER_CLK_CLKSEL2_SPI0SEL_PCLK1 0x00000020 99 0 : #define NUMAKER_CLK_CLKSEL2_SPI0SEL_HIRC 0x00000030 100 0 : #define NUMAKER_CLK_CLKSEL2_SPI0SEL_HIRC48M 0x00000040 101 0 : #define NUMAKER_CLK_CLKSEL2_TKSEL_HIRC 0x00000000 102 0 : #define NUMAKER_CLK_CLKSEL2_TKSEL_MIRC 0x00000080 103 0 : #define NUMAKER_CLK_CLKSEL2_SPI1SEL_HXT 0x00000000 104 0 : #define NUMAKER_CLK_CLKSEL2_SPI1SEL_PLL 0x00001000 105 0 : #define NUMAKER_CLK_CLKSEL2_SPI1SEL_PCLK0 0x00002000 106 0 : #define NUMAKER_CLK_CLKSEL2_SPI1SEL_HIRC 0x00003000 107 0 : #define NUMAKER_CLK_CLKSEL2_SPI1SEL_HIRC48M 0x00004000 108 0 : #define NUMAKER_CLK_CLKSEL3_PWM0SEL_HCLK 0x00000000 109 0 : #define NUMAKER_CLK_CLKSEL3_PWM0SEL_HCLK0 0x00000000 110 0 : #define NUMAKER_CLK_CLKSEL3_PWM0SEL_PCLK0 0x00000040 111 0 : #define NUMAKER_CLK_CLKSEL3_PWM1SEL_HCLK 0x00000000 112 0 : #define NUMAKER_CLK_CLKSEL3_PWM1SEL_HCLK0 0x00000000 113 0 : #define NUMAKER_CLK_CLKSEL3_PWM1SEL_PCLK1 0x00000080 114 0 : #define NUMAKER_CLK_CLKSEL3_SPI2SEL_HXT 0x00000000 115 0 : #define NUMAKER_CLK_CLKSEL3_SPI2SEL_PLL 0x00000100 116 0 : #define NUMAKER_CLK_CLKSEL3_SPI2SEL_PCLK1 0x00000200 117 0 : #define NUMAKER_CLK_CLKSEL3_SPI2SEL_HIRC 0x00000300 118 0 : #define NUMAKER_CLK_CLKSEL3_SPI2SEL_HIRC48M 0x00000400 119 0 : #define NUMAKER_CLK_CLKSEL3_SPI3SEL_HXT 0x00000000 120 0 : #define NUMAKER_CLK_CLKSEL3_SPI3SEL_PLL 0x00001000 121 0 : #define NUMAKER_CLK_CLKSEL3_SPI3SEL_PCLK0 0x00002000 122 0 : #define NUMAKER_CLK_CLKSEL3_SPI3SEL_HIRC 0x00003000 123 0 : #define NUMAKER_CLK_CLKSEL3_SPI3SEL_HIRC48M 0x00004000 124 0 : #define NUMAKER_CLK_CLKSEL4_UART0SEL_HXT 0x00000000 125 0 : #define NUMAKER_CLK_CLKSEL4_UART0SEL_PLL 0x00000001 126 0 : #define NUMAKER_CLK_CLKSEL4_UART0SEL_LXT 0x00000002 127 0 : #define NUMAKER_CLK_CLKSEL4_UART0SEL_HIRC 0x00000003 128 0 : #define NUMAKER_CLK_CLKSEL4_UART0SEL_MIRC 0x00000004 129 0 : #define NUMAKER_CLK_CLKSEL4_UART0SEL_HIRC48M 0x00000005 130 0 : #define NUMAKER_CLK_CLKSEL4_UART1SEL_HXT 0x00000000 131 0 : #define NUMAKER_CLK_CLKSEL4_UART1SEL_PLL 0x00000010 132 0 : #define NUMAKER_CLK_CLKSEL4_UART1SEL_LXT 0x00000020 133 0 : #define NUMAKER_CLK_CLKSEL4_UART1SEL_HIRC 0x00000030 134 0 : #define NUMAKER_CLK_CLKSEL4_UART1SEL_MIRC 0x00000040 135 0 : #define NUMAKER_CLK_CLKSEL4_UART1SEL_HIRC48M 0x00000050 136 0 : #define NUMAKER_CLK_CLKSEL4_UART2SEL_HXT 0x00000000 137 0 : #define NUMAKER_CLK_CLKSEL4_UART2SEL_PLL 0x00000100 138 0 : #define NUMAKER_CLK_CLKSEL4_UART2SEL_LXT 0x00000200 139 0 : #define NUMAKER_CLK_CLKSEL4_UART2SEL_HIRC 0x00000300 140 0 : #define NUMAKER_CLK_CLKSEL4_UART2SEL_MIRC 0x00000400 141 0 : #define NUMAKER_CLK_CLKSEL4_UART2SEL_HIRC48M 0x00000500 142 0 : #define NUMAKER_CLK_CLKSEL4_UART3SEL_HXT 0x00000000 143 0 : #define NUMAKER_CLK_CLKSEL4_UART3SEL_PLL 0x00001000 144 0 : #define NUMAKER_CLK_CLKSEL4_UART3SEL_LXT 0x00002000 145 0 : #define NUMAKER_CLK_CLKSEL4_UART3SEL_HIRC 0x00003000 146 0 : #define NUMAKER_CLK_CLKSEL4_UART3SEL_MIRC 0x00004000 147 0 : #define NUMAKER_CLK_CLKSEL4_UART3SEL_HIRC48M 0x00005000 148 0 : #define NUMAKER_CLK_CLKSEL4_UART4SEL_HXT 0x00000000 149 0 : #define NUMAKER_CLK_CLKSEL4_UART4SEL_PLL 0x00010000 150 0 : #define NUMAKER_CLK_CLKSEL4_UART4SEL_LXT 0x00020000 151 0 : #define NUMAKER_CLK_CLKSEL4_UART4SEL_HIRC 0x00030000 152 0 : #define NUMAKER_CLK_CLKSEL4_UART4SEL_MIRC 0x00040000 153 0 : #define NUMAKER_CLK_CLKSEL4_UART4SEL_HIRC48M 0x00050000 154 0 : #define NUMAKER_CLK_CLKSEL4_UART5SEL_HXT 0x00000000 155 0 : #define NUMAKER_CLK_CLKSEL4_UART5SEL_PLL 0x00100000 156 0 : #define NUMAKER_CLK_CLKSEL4_UART5SEL_LXT 0x00200000 157 0 : #define NUMAKER_CLK_CLKSEL4_UART5SEL_HIRC 0x00300000 158 0 : #define NUMAKER_CLK_CLKSEL4_UART5SEL_MIRC 0x00400000 159 0 : #define NUMAKER_CLK_CLKSEL4_UART5SEL_HIRC48M 0x00500000 160 0 : #define NUMAKER_CLK_CLKSEL4_UART6SEL_HXT 0x00000000 161 0 : #define NUMAKER_CLK_CLKSEL4_UART6SEL_PLL 0x01000000 162 0 : #define NUMAKER_CLK_CLKSEL4_UART6SEL_LXT 0x02000000 163 0 : #define NUMAKER_CLK_CLKSEL4_UART6SEL_HIRC 0x03000000 164 0 : #define NUMAKER_CLK_CLKSEL4_UART6SEL_MIRC 0x04000000 165 0 : #define NUMAKER_CLK_CLKSEL4_UART6SEL_HIRC48M 0x05000000 166 0 : #define NUMAKER_CLK_CLKSEL4_UART7SEL_HXT 0x00000000 167 0 : #define NUMAKER_CLK_CLKSEL4_UART7SEL_PLL 0x10000000 168 0 : #define NUMAKER_CLK_CLKSEL4_UART7SEL_LXT 0x20000000 169 0 : #define NUMAKER_CLK_CLKSEL4_UART7SEL_HIRC 0x30000000 170 0 : #define NUMAKER_CLK_CLKSEL4_UART7SEL_MIRC 0x40000000 171 0 : #define NUMAKER_CLK_CLKSEL4_UART7SEL_HIRC48M 0x50000000 172 0 : #define NUMAKER_CLK_CLKDIV0_HCLK(x) (((x) - 1UL) << (0)) 173 0 : #define NUMAKER_CLK_CLKDIV0_HCLK0(x) (((x) - 1UL) << (0)) 174 0 : #define NUMAKER_CLK_CLKDIV0_USB(x) (((x) - 1UL) << (4)) 175 0 : #define NUMAKER_CLK_CLKDIV0_UART0(x) (((x) - 1UL) << (8)) 176 0 : #define NUMAKER_CLK_CLKDIV0_UART1(x) (((x) - 1UL) << (12)) 177 0 : #define NUMAKER_CLK_CLKDIV0_EADC0(x) (((x) - 1UL) << (16)) 178 0 : #define NUMAKER_CLK_CLKDIV4_UART2(x) (((x) - 1UL) << (0)) 179 0 : #define NUMAKER_CLK_CLKDIV4_UART3(x) (((x) - 1UL) << (4)) 180 0 : #define NUMAKER_CLK_CLKDIV4_UART4(x) (((x) - 1UL) << (8)) 181 0 : #define NUMAKER_CLK_CLKDIV4_UART5(x) (((x) - 1UL) << (12)) 182 0 : #define NUMAKER_CLK_CLKDIV4_UART6(x) (((x) - 1UL) << (16)) 183 0 : #define NUMAKER_CLK_CLKDIV4_UART7(x) (((x) - 1UL) << (20)) 184 0 : #define NUMAKER_CLK_CLKDIV5_CANFD0(x) (((x) - 1UL) << (0)) 185 0 : #define NUMAKER_CLK_CLKDIV5_CANFD1(x) (((x) - 1UL) << (4)) 186 0 : #define NUMAKER_CLK_PCLKDIV_APB0DIV_DIV1 0x00000000 187 0 : #define NUMAKER_CLK_PCLKDIV_APB0DIV_DIV2 0x00000001 188 0 : #define NUMAKER_CLK_PCLKDIV_APB0DIV_DIV4 0x00000002 189 0 : #define NUMAKER_CLK_PCLKDIV_APB0DIV_DIV8 0x00000003 190 0 : #define NUMAKER_CLK_PCLKDIV_APB0DIV_DIV16 0x00000004 191 0 : #define NUMAKER_CLK_PCLKDIV_APB1DIV_DIV1 0x00000000 192 0 : #define NUMAKER_CLK_PCLKDIV_APB1DIV_DIV2 0x00000010 193 0 : #define NUMAKER_CLK_PCLKDIV_APB1DIV_DIV4 0x00000020 194 0 : #define NUMAKER_CLK_PCLKDIV_APB1DIV_DIV8 0x00000030 195 0 : #define NUMAKER_CLK_PCLKDIV_APB1DIV_DIV16 0x00000040 196 0 : #define NUMAKER_PDMA0_MODULE 0x00000001 197 0 : #define NUMAKER_ISP_MODULE 0x00000002 198 0 : #define NUMAKER_EBI_MODULE 0x00000003 199 0 : #define NUMAKER_ST_MODULE 0x018C0004 200 0 : #define NUMAKER_CRC_MODULE 0x00000007 201 0 : #define NUMAKER_CRPT_MODULE 0x0000000C 202 0 : #define NUMAKER_KS_MODULE 0x0000000D 203 0 : #define NUMAKER_USBH_MODULE 0x00A01090 204 0 : #define NUMAKER_GPA_MODULE 0x00000018 205 0 : #define NUMAKER_GPB_MODULE 0x00000019 206 0 : #define NUMAKER_GPC_MODULE 0x0000001A 207 0 : #define NUMAKER_GPD_MODULE 0x0000001B 208 0 : #define NUMAKER_GPE_MODULE 0x0000001C 209 0 : #define NUMAKER_GPF_MODULE 0x0000001D 210 0 : #define NUMAKER_GPG_MODULE 0x0000001E 211 0 : #define NUMAKER_GPH_MODULE 0x0000001F 212 0 : #define NUMAKER_RTC_MODULE 0x20000001 213 0 : #define NUMAKER_TMR0_MODULE 0x25A00002 214 0 : #define NUMAKER_TMR1_MODULE 0x25B00003 215 0 : #define NUMAKER_TMR2_MODULE 0x25C00004 216 0 : #define NUMAKER_TMR3_MODULE 0x25D00005 217 0 : #define NUMAKER_CLKO_MODULE 0x26100006 218 0 : #define NUMAKER_ACMP01_MODULE 0x20000007 219 0 : #define NUMAKER_I2C0_MODULE 0x20000008 220 0 : #define NUMAKER_I2C1_MODULE 0x20000009 221 0 : #define NUMAKER_I2C2_MODULE 0x2000000A 222 0 : #define NUMAKER_I2C3_MODULE 0x2000000B 223 0 : #define NUMAKER_QSPI0_MODULE 0x2908000C 224 0 : #define NUMAKER_SPI0_MODULE 0x2990000D 225 0 : #define NUMAKER_SPI1_MODULE 0x29B0000E 226 0 : #define NUMAKER_SPI2_MODULE 0x2DA0000F 227 0 : #define NUMAKER_UART0_MODULE 0x31801110 228 0 : #define NUMAKER_UART1_MODULE 0x31901191 229 0 : #define NUMAKER_UART2_MODULE 0x31A11012 230 0 : #define NUMAKER_UART3_MODULE 0x31B11093 231 0 : #define NUMAKER_UART4_MODULE 0x31C11114 232 0 : #define NUMAKER_UART5_MODULE 0x31D11195 233 0 : #define NUMAKER_UART6_MODULE 0x31E11216 234 0 : #define NUMAKER_UART7_MODULE 0x31F11297 235 0 : #define NUMAKER_OTG_MODULE 0x2000001A 236 0 : #define NUMAKER_USBD_MODULE 0x20A0109B 237 0 : #define NUMAKER_EADC0_MODULE 0x2128221C 238 0 : #define NUMAKER_TRNG_MODULE 0x2000001F 239 0 : #define NUMAKER_SPI3_MODULE 0x4DB00006 240 0 : #define NUMAKER_USCI0_MODULE 0x40000008 241 0 : #define NUMAKER_USCI1_MODULE 0x40000009 242 0 : #define NUMAKER_WWDT_MODULE 0x4578000B 243 0 : #define NUMAKER_DAC_MODULE 0x4000000C 244 0 : #define NUMAKER_EPWM0_MODULE 0x48800010 245 0 : #define NUMAKER_EPWM1_MODULE 0x48840011 246 0 : #define NUMAKER_EQEI0_MODULE 0x40000016 247 0 : #define NUMAKER_EQEI1_MODULE 0x40000017 248 0 : #define NUMAKER_TK_MODULE 0x489C0019 249 0 : #define NUMAKER_ECAP0_MODULE 0x4000001A 250 0 : #define NUMAKER_ECAP1_MODULE 0x4000001B 251 0 : #define NUMAKER_ACMP2_MODULE 0x60000007 252 0 : #define NUMAKER_PWM0_MODULE 0x6C980008 253 0 : #define NUMAKER_PWM1_MODULE 0x6C9C0009 254 0 : #define NUMAKER_UTCPD0_MODULE 0x6000000F 255 0 : #define NUMAKER_CANRAM0_MODULE 0x80000010 256 0 : #define NUMAKER_CANRAM1_MODULE 0x80000011 257 0 : #define NUMAKER_CANFD0_MODULE 0x81621014 258 0 : #define NUMAKER_CANFD1_MODULE 0x816A1095 259 0 : #define NUMAKER_HCLK1_MODULE 0x81B3101C 260 0 : #define NUMAKER_LPPDMA0_MODULE 0xA0000000 261 0 : #define NUMAKER_LPGPIO_MODULE 0xA0000001 262 0 : #define NUMAKER_LPSRAM_MODULE 0xA0000002 263 0 : #define NUMAKER_WDT_MODULE 0xB5600010 264 0 : #define NUMAKER_LPSPI0_MODULE 0xB5080011 265 0 : #define NUMAKER_LPI2C0_MODULE 0xA0000012 266 0 : #define NUMAKER_LPUART0_MODULE 0xB5031113 267 0 : #define NUMAKER_LPTMR0_MODULE 0xB5A00014 268 0 : #define NUMAKER_LPTMR1_MODULE 0xB5B00015 269 0 : #define NUMAKER_TTMR0_MODULE 0xB5100016 270 0 : #define NUMAKER_TTMR1_MODULE 0xB5180017 271 0 : #define NUMAKER_LPADC0_MODULE 0xB5431218 272 0 : #define NUMAKER_OPA_MODULE 0xA000001B 273 : 274 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_PD 0x00000000 275 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_NPD0 0x00000000 276 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_NPD1 0x00000001 277 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_NPD2 0x00000002 278 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_NPD3 0x00000003 279 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_NPD4 0x00000004 280 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_NPD5 0x00000005 281 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_SPD0 0x00000008 282 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_SPD1 0x00000009 283 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_SPD2 0x0000000A 284 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_DPD0 0x0000000C 285 0 : #define NUMAKER_CLK_PMUCTL_PDMSEL_DPD1 0x0000000D 286 : 287 : #endif
