Line data Source code
1 0 : /*
2 : * Copyright (c) 2022 Andrei-Edward Popa
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RPI_PICO_CLOCK_COMMON_H_
7 : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RPI_PICO_CLOCK_COMMON_H_
8 :
9 0 : #define RPI_PICO_PLL_SYS 0
10 0 : #define RPI_PICO_PLL_USB 1
11 0 : #define RPI_PICO_PLL_COUNT 2
12 :
13 0 : #define RPI_PICO_GPIN_0 0
14 0 : #define RPI_PICO_GPIN_1 1
15 0 : #define RPI_PICO_GPIN_COUNT 2
16 :
17 0 : #define RPI_PICO_CLKID_CLK_GPOUT0 0
18 0 : #define RPI_PICO_CLKID_CLK_GPOUT1 1
19 0 : #define RPI_PICO_CLKID_CLK_GPOUT2 2
20 0 : #define RPI_PICO_CLKID_CLK_GPOUT3 3
21 0 : #define RPI_PICO_CLKID_CLK_REF 4
22 0 : #define RPI_PICO_CLKID_CLK_SYS 5
23 0 : #define RPI_PICO_CLKID_CLK_PERI 6
24 : /* N.b. clock ids 7-9 are defined in SoC-specific files. */
25 :
26 0 : #define RPI_PICO_CLKID_PLL_SYS 10
27 0 : #define RPI_PICO_CLKID_PLL_USB 11
28 0 : #define RPI_PICO_CLKID_XOSC 12
29 0 : #define RPI_PICO_CLKID_ROSC 13
30 0 : #define RPI_PICO_CLKID_ROSC_PH 14
31 0 : #define RPI_PICO_CLKID_GPIN0 15
32 0 : #define RPI_PICO_CLKID_GPIN1 16
33 :
34 0 : #define RPI_PICO_ROSC_RANGE_RESET 0xAA0
35 0 : #define RPI_PICO_ROSC_RANGE_LOW 0xFA4
36 0 : #define RPI_PICO_ROSC_RANGE_MEDIUM 0xFA5
37 0 : #define RPI_PICO_ROSC_RANGE_HIGH 0xFA7
38 0 : #define RPI_PICO_ROSC_RANGE_TOOHIGH 0xFA6
39 :
40 0 : #define RPI_PICO_CLOCK_COUNT 10
41 :
42 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RPI_PICO_CLOCK_COMMON_H_ */
|