Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2022 Teslabs Engineering S.L.
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : 
       7              : #ifndef _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_SF32LB_CLOCKS_COMMON_H_
       8              : #define _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_SF32LB_CLOCKS_COMMON_H_
       9              : 
      10              : /** @cond INTERNAL_HIDDEN */
      11              : 
      12              : #define SF32LB_CLOCK_OFFSET_POS  0U
      13              : #define SF32LB_CLOCK_OFFSET_MSK  0xFFU
      14              : #define SF32LB_CLOCK_BIT_POS     8U
      15              : #define SF32LB_CLOCK_BIT_MSK     0x1F00U
      16              : 
      17              : /** @endcond */
      18              : 
      19              : /**
      20              :  * @brief Encode RCC register offset and configuration bit.
      21              :  *
      22              :  * Bitmap:
      23              :  * - 0..7:  offset
      24              :  * - 8..12: bit number
      25              :  * - 13-15: reserved
      26              :  *
      27              :  * @param offset RCC register offset to ENRx register
      28              :  * @param bit Configuration bit
      29              :  */
      30            1 : #define SF32LB_CLOCK_CONFIG(offset, bit) \
      31              :         ((((offset) & SF32LB_CLOCK_OFFSET_MSK) << SF32LB_CLOCK_OFFSET_POS) | \
      32              :          (((bit) & SF32LB_CLOCK_BIT_MSK) << SF32LB_CLOCK_BIT_POS))
      33              : 
      34              : #endif /* _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_SF32LB_CLOCKS_COMMON_H_ */