Line data    Source code

       1           0 : /*
       2             :  * Copyright (c) 2017 Linaro Limited
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_CLOCK_H_
       7             : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_CLOCK_H_
       8             : 
       9             : /* clock bus references */
      10           0 : #define STM32_CLOCK_BUS_AHB1    0
      11           0 : #define STM32_CLOCK_BUS_AHB2    1
      12           0 : #define STM32_CLOCK_BUS_APB1    2
      13           0 : #define STM32_CLOCK_BUS_APB2    3
      14           0 : #define STM32_CLOCK_BUS_APB1_2  4
      15           0 : #define STM32_CLOCK_BUS_IOP     5
      16           0 : #define STM32_CLOCK_BUS_AHB3    6
      17           0 : #define STM32_CLOCK_BUS_AHB4    7
      18           0 : #define STM32_CLOCK_BUS_AHB5    8
      19           0 : #define STM32_CLOCK_BUS_AHB6    9
      20           0 : #define STM32_CLOCK_BUS_APB3    10
      21           0 : #define STM32_CLOCK_BUS_APB4    11
      22           0 : #define STM32_CLOCK_BUS_APB5    12
      23           0 : #define STM32_CLOCK_BUS_AXI     13
      24           0 : #define STM32_CLOCK_BUS_MLAHB   14
      25             : 
      26           0 : #define STM32_CLOCK_DIV_SHIFT   12
      27             : 
      28             : /** Clock divider */
      29           1 : #define STM32_CLOCK_DIV(div)    (((div) - 1) << STM32_CLOCK_DIV_SHIFT)
      30             : 
      31             : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_CLOCK_H_ */