Line data    Source code

       1           0 : /*
       2             :  * SPDX-License-Identifier: Apache-2.0
       3             :  *
       4             :  * Copyright (C) 2024, Joakim Andersson
       5             :  */
       6             : 
       7             : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32F10X_CLOCK_H_
       8             : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32F10X_CLOCK_H_
       9             : 
      10             : #include "stm32_common_clocks.h"
      11             : /* Ensure correct order by including generic F1 definitions first. */
      12             : #include "stm32f1_clock.h"
      13             : 
      14             : /** Fixed clocks  */
      15             : /* Low speed clocks defined in stm32_common_clocks.h */
      16             : /* Common clocks with stm32f1x defined in stm32f1_clock.h */
      17           1 : #define STM32_SRC_PLL2CLK           (STM32_SRC_PLLCLK + 1)
      18           0 : #define STM32_SRC_PLL3CLK           (STM32_SRC_PLL2CLK + 1)
      19             : 
      20             : /** CFGR1 devices */
      21             : #undef MCO1_SEL /* Need to redefine generic F1 MCO_SEL for connectivity line devices. */
      22           1 : #define MCO1_SEL(val)           STM32_MCO_CFGR(val, 0xF, 24, CFGR1_REG)
      23             : /* No MCO prescaler support on STM32F1 series. */
      24             : 
      25             : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32F10X_CLOCK_H_ */