Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2025 STMicroelectronics
       3              :  *
       4              :  * SPDX-License-Identifier: Apache-2.0
       5              :  */
       6              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32L4PLUS_CLOCK_H_
       7              : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32L4PLUS_CLOCK_H_
       8              : 
       9              : #include "stm32l4_clock.h"
      10              : 
      11              : /*
      12              :  * On STM32L4+ series, the SAI1 / SAI2 input clock selection fields
      13              :  * are located within the CCIPR2 register instead of the CCIPR register
      14              :  */
      15              : #undef SAI1_SEL(val)
      16              : #undef SAI2_SEL(val)
      17              : 
      18              : /** CCIPR2 devices */
      19            0 : #define SAI1_SEL(val)           STM32_DT_CLOCK_SELECT((val), 7, 5, CCIPR2_REG)
      20            0 : #define SAI2_SEL(val)           STM32_DT_CLOCK_SELECT((val), 7, 8, CCIPR2_REG)
      21              : 
      22              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32L4PLUS_CLOCK_H_ */