Line data Source code
1 0 : /*
2 : * Copyright (C) 2025 Savoir-faire Linux, Inc.
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 :
7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32MP2_CLOCK_H_
8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32MP2_CLOCK_H_
9 :
10 : #include "stm32_common_clocks.h"
11 :
12 : /* Undefine the common clocks macro */
13 : #undef STM32_CLOCK
14 :
15 : /**
16 : * Pack RCC clock register offset and bit in two 32-bit values
17 : * as expected for the Device Tree `clocks` property on STM32.
18 : *
19 : * @param per STM32 Peripheral name (expands to STM32_CLOCK_PERIPH_{PER})
20 : * @param bit Clock bit
21 : */
22 1 : #define STM32_CLOCK(per, bit) (STM32_CLOCK_PERIPH_##per) (1 << bit)
23 :
24 : /* Clock reg */
25 0 : #define STM32_CLK 1U
26 0 : #define STM32_LP_CLK 2U
27 :
28 : /* GPIO Peripheral */
29 0 : #define STM32_CLOCK_PERIPH_GPIOA 0x52C
30 0 : #define STM32_CLOCK_PERIPH_GPIOB 0x530
31 0 : #define STM32_CLOCK_PERIPH_GPIOC 0x534
32 0 : #define STM32_CLOCK_PERIPH_GPIOD 0x538
33 0 : #define STM32_CLOCK_PERIPH_GPIOE 0x53C
34 0 : #define STM32_CLOCK_PERIPH_GPIOF 0x540
35 0 : #define STM32_CLOCK_PERIPH_GPIOG 0x544
36 0 : #define STM32_CLOCK_PERIPH_GPIOH 0x548
37 0 : #define STM32_CLOCK_PERIPH_GPIOI 0x54C
38 0 : #define STM32_CLOCK_PERIPH_GPIOJ 0x550
39 0 : #define STM32_CLOCK_PERIPH_GPIOK 0x554
40 0 : #define STM32_CLOCK_PERIPH_GPIOZ 0x558
41 :
42 : /* SPI Peripheral */
43 0 : #define STM32_CLOCK_PERIPH_SPI1 0x758
44 0 : #define STM32_CLOCK_PERIPH_SPI2 0x75C
45 0 : #define STM32_CLOCK_PERIPH_SPI3 0x760
46 0 : #define STM32_CLOCK_PERIPH_SPI4 0x764
47 0 : #define STM32_CLOCK_PERIPH_SPI5 0x768
48 0 : #define STM32_CLOCK_PERIPH_SPI6 0x76C
49 0 : #define STM32_CLOCK_PERIPH_SPI7 0x770
50 :
51 : /* USART/UART Peripheral */
52 0 : #define STM32_CLOCK_PERIPH_USART1 0x77C
53 0 : #define STM32_CLOCK_PERIPH_USART2 0x780
54 0 : #define STM32_CLOCK_PERIPH_USART3 0x784
55 0 : #define STM32_CLOCK_PERIPH_UART4 0x788
56 0 : #define STM32_CLOCK_PERIPH_UART5 0x78C
57 0 : #define STM32_CLOCK_PERIPH_USART6 0x790
58 0 : #define STM32_CLOCK_PERIPH_UART7 0x794
59 0 : #define STM32_CLOCK_PERIPH_UART8 0x798
60 0 : #define STM32_CLOCK_PERIPH_UART9 0x79C
61 :
62 : /* I2C Peripheral */
63 0 : #define STM32_CLOCK_PERIPH_I2C1 0x7A0
64 0 : #define STM32_CLOCK_PERIPH_I2C2 0x7A8
65 0 : #define STM32_CLOCK_PERIPH_I2C3 0x7AC
66 0 : #define STM32_CLOCK_PERIPH_I2C4 0x7B0
67 0 : #define STM32_CLOCK_PERIPH_I2C5 0x7B4
68 0 : #define STM32_CLOCK_PERIPH_I2C6 0x7B8
69 0 : #define STM32_CLOCK_PERIPH_I2C7 0x7BC
70 0 : #define STM32_CLOCK_PERIPH_I2C8 0x7C0
71 :
72 : /* Watchdog Peripheral */
73 0 : #define STM32_CLOCK_PERIPH_IWDG4 0x894
74 0 : #define STM32_CLOCK_PERIPH_WWDG1 0x89C
75 :
76 0 : #define STM32_CLOCK_PERIPH_MIN STM32_CLOCK_PERIPH_GPIOA
77 0 : #define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_WWDG1
78 :
79 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32MP2_CLOCK_H_ */
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