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1 0 : /* 2 : * Copyright (c) 2023 Analog Devices, Inc. 3 : * 4 : * SPDX-License-Identifier: Apache-2.0 5 : */ 6 : 7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32690_DMA_H_ 8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32690_DMA_H_ 9 : 10 0 : #define MAX32_DMA_SLOT_MEMTOMEM 0x00U 11 0 : #define MAX32_DMA_SLOT_SPI0_RX 0x01U 12 0 : #define MAX32_DMA_SLOT_SPI1_RX 0x02U 13 0 : #define MAX32_DMA_SLOT_SPI2_RX 0x03U 14 0 : #define MAX32_DMA_SLOT_UART0_RX 0x04U 15 0 : #define MAX32_DMA_SLOT_UART1_RX 0x05U 16 0 : #define MAX32_DMA_SLOT_CAN0_RX 0x06U 17 0 : #define MAX32_DMA_SLOT_I2C0_RX 0x07U 18 0 : #define MAX32_DMA_SLOT_I2C1_RX 0x08U 19 0 : #define MAX32_DMA_SLOT_ADC 0x09U 20 0 : #define MAX32_DMA_SLOT_I2C2_RX 0x0AU 21 0 : #define MAX32_DMA_SLOT_UART2_RX 0x0EU 22 0 : #define MAX32_DMA_SLOT_SPI3_RX 0x0FU 23 0 : #define MAX32_DMA_SLOT_SPI4_RX 0x10U 24 0 : #define MAX32_DMA_SLOT_USB1_IN 0x11U 25 0 : #define MAX32_DMA_SLOT_USB2_IN 0x12U 26 0 : #define MAX32_DMA_SLOT_USB3_IN 0x13U 27 0 : #define MAX32_DMA_SLOT_USB4_IN 0x14U 28 0 : #define MAX32_DMA_SLOT_USB5_IN 0x15U 29 0 : #define MAX32_DMA_SLOT_USB6_IN 0x16U 30 0 : #define MAX32_DMA_SLOT_USB7_IN 0x17U 31 0 : #define MAX32_DMA_SLOT_USB8_IN 0x18U 32 0 : #define MAX32_DMA_SLOT_USB9_IN 0x19U 33 0 : #define MAX32_DMA_SLOT_USB10_IN 0x1AU 34 0 : #define MAX32_DMA_SLOT_USB11_IN 0x1BU 35 0 : #define MAX32_DMA_SLOT_UART3_RX 0x1CU 36 0 : #define MAX32_DMA_SLOT_I2S_RX 0x1EU 37 0 : #define MAX32_DMA_SLOT_CAN1_RX 0x1FU 38 0 : #define MAX32_DMA_SLOT_SPI0_TX 0x21U 39 0 : #define MAX32_DMA_SLOT_SPI1_TX 0x22U 40 0 : #define MAX32_DMA_SLOT_SPI2_TX 0x23U 41 0 : #define MAX32_DMA_SLOT_UART0_TX 0x24U 42 0 : #define MAX32_DMA_SLOT_UART1_TX 0x25U 43 0 : #define MAX32_DMA_SLOT_CAN0_TX 0x26U 44 0 : #define MAX32_DMA_SLOT_I2C0_TX 0x27U 45 0 : #define MAX32_DMA_SLOT_I2C1_TX 0x28U 46 0 : #define MAX32_DMA_SLOT_I2C2_TX 0x2AU 47 0 : #define MAX32_DMA_SLOT_UART2_TX 0x2EU 48 0 : #define MAX32_DMA_SLOT_SPI3_TX 0x2FU 49 0 : #define MAX32_DMA_SLOT_SPI4_TX 0x30U 50 0 : #define MAX32_DMA_SLOT_USB1_OUT 0x31U 51 0 : #define MAX32_DMA_SLOT_USB2_OUT 0x32U 52 0 : #define MAX32_DMA_SLOT_USB3_OUT 0x33U 53 0 : #define MAX32_DMA_SLOT_USB4_OUT 0x34U 54 0 : #define MAX32_DMA_SLOT_USB5_OUT 0x35U 55 0 : #define MAX32_DMA_SLOT_USB6_OUT 0x36U 56 0 : #define MAX32_DMA_SLOT_USB7_OUT 0x37U 57 0 : #define MAX32_DMA_SLOT_USB8_OUT 0x38U 58 0 : #define MAX32_DMA_SLOT_USB9_OUT 0x39U 59 0 : #define MAX32_DMA_SLOT_USB10_OUT 0x3AU 60 0 : #define MAX32_DMA_SLOT_USB11_OUT 0x3BU 61 0 : #define MAX32_DMA_SLOT_UART3_TX 0x3CU 62 0 : #define MAX32_DMA_SLOT_I2S_TX 0x3EU 63 0 : #define MAX32_DMA_SLOT_CAN1_TX 0x3FU 64 : 65 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32690_DMA_H_ */
