Line data    Source code

       1            0 : /*
       2              :  * Copyright (c) 2025 Core Devices LLC
       3              :  * SPDX-License-Identifier: Apache-2.0
       4              :  */
       5              : 
       6              : #ifndef INCLUDE_ZEPHYR_DT_BINDINGS_DMA_SF32LB_DMA_CONFIG_H_
       7              : #define INCLUDE_ZEPHYR_DT_BINDINGS_DMA_SF32LB_DMA_CONFIG_H_
       8              : 
       9            0 : #define SF32LB_DMA_PL_POS       0U
      10            0 : #define SF32LB_DMA_PL_MSK       (3UL << SF32LB_DMA_PL_POS)
      11            0 : #define SF32LB_DMA_PL_LOW       (0UL << SF32LB_DMA_PL_POS)
      12            0 : #define SF32LB_DMA_PL_MEDIUM    (1UL << SF32LB_DMA_PL_POS)
      13            0 : #define SF32LB_DMA_PL_HIGH      (2UL << SF32LB_DMA_PL_POS)
      14            0 : #define SF32LB_DMA_PL_VERY_HIGH (3UL << SF32LB_DMA_PL_POS)
      15              : 
      16              : #endif /* INCLUDE_ZEPHYR_DT_BINDINGS_DMA_SF32LB_DMA_CONFIG_H_ */