LCOV - code coverage report
Current view: top level - zephyr/dt-bindings/espi - npcx_espi.h Hit Total Coverage
Test: new.info Lines: 0 45 0.0 %
Date: 2025-01-02 12:14:04

          Line data    Source code
       1           0 : /*
       2             :  * Copyright (c) 2020 Nuvoton Technology Corporation.
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCX_ESPI_H_
       7             : #define ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCX_ESPI_H_
       8             : 
       9             : /*
      10             :  * Encode virtual wire information into a 16-bit unsigned.
      11             :  * index  = bits[7:0], Replacement index number
      12             :  * group = bits[11:8], Group number for VWEVMS or VWEVSM
      13             :  * dir = bits[13:12], Direction for controller to target or target to controller
      14             :  */
      15           0 : #define ESPI_NPCX_VW_EX_VAL(dir, group, index)                                                     \
      16             :         (((dir & 0x1) << 12) + ((group & 0xf) << 8) + (index & 0xff))
      17             : 
      18             : /* extract specific information from encoded ESPI_NPCX_VW_EX_VAL */
      19           0 : #define ESPI_NPCX_VW_EX_INDEX(e)     ((e) & 0xff)
      20           0 : #define ESPI_NPCX_VW_EX_GROUP_NUM(e) (((e) >> 8) & 0xf)
      21           0 : #define ESPI_NPCX_VW_EX_DIR(e)       (((e) >> 12) & 0x1)
      22             : 
      23             : /* eSPI VW Master to Slave Register Index */
      24           0 : #define NPCX_VWEVMS0 0
      25           0 : #define NPCX_VWEVMS1 1
      26           0 : #define NPCX_VWEVMS2 2
      27           0 : #define NPCX_VWEVMS3 3
      28           0 : #define NPCX_VWEVMS4 4
      29           0 : #define NPCX_VWEVMS5 5
      30           0 : #define NPCX_VWEVMS6 6
      31           0 : #define NPCX_VWEVMS7 7
      32           0 : #define NPCX_VWEVMS8 8
      33           0 : #define NPCX_VWEVMS9 9
      34           0 : #define NPCX_VWEVMS10 10
      35           0 : #define NPCX_VWEVMS11 11
      36           0 : #define NPCX_VWEVMS_MAX 12
      37             : 
      38             : /* eSPI VW Slave to Master Register Index */
      39           0 : #define NPCX_VWEVSM0 0
      40           0 : #define NPCX_VWEVSM1 1
      41           0 : #define NPCX_VWEVSM2 2
      42           0 : #define NPCX_VWEVSM3 3
      43           0 : #define NPCX_VWEVSM4 4
      44           0 : #define NPCX_VWEVSM5 5
      45           0 : #define NPCX_VWEVSM6 6
      46           0 : #define NPCX_VWEVSM7 7
      47           0 : #define NPCX_VWEVSM8 8
      48           0 : #define NPCX_VWEVSM9 9
      49           0 : #define NPCX_VWEVSM_MAX 10
      50             : 
      51             : /* eSPI VW GPIO Slave to Master Register Index */
      52           0 : #define NPCX_VWGPSM0 0
      53           0 : #define NPCX_VWGPSM1 1
      54           0 : #define NPCX_VWGPSM2 2
      55           0 : #define NPCX_VWGPSM3 3
      56           0 : #define NPCX_VWGPSM4 4
      57           0 : #define NPCX_VWGPSM5 5
      58           0 : #define NPCX_VWGPSM6 6
      59           0 : #define NPCX_VWGPSM7 7
      60           0 : #define NPCX_VWGPSM8 8
      61           0 : #define NPCX_VWGPSM9 9
      62           0 : #define NPCX_VWGPSM10 10
      63           0 : #define NPCX_VWGPSM11 11
      64           0 : #define NPCX_VWGPSM12 12
      65           0 : #define NPCX_VWGPSM13 13
      66           0 : #define NPCX_VWGPSM14 14
      67           0 : #define NPCX_VWGPSM15 15
      68             : 
      69             : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCX_ESPI_H_ */

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