Line data    Source code

       1           0 : /*
       2             :  * Copyright (c) 2023-2024 Analog Devices, Inc.
       3             :  *
       4             :  * SPDX-License-Identifier: Apache-2.0
       5             :  */
       6             : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ADI_MAX32_GPIO_H_
       7             : #define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ADI_MAX32_GPIO_H_
       8             : 
       9             : /**
      10             :  * @brief MAX32-specific GPIO Flags
      11             :  * @defgroup gpio_interface_max32 MAX32-specific GPIO Flags
      12             :  * @ingroup gpio_interface
      13             :  * @{
      14             :  */
      15             : 
      16             : /**
      17             :  * @name MAX32 GPIO drive flags
      18             :  * @brief MAX32 GPIO drive flags
      19             :  *
      20             :  * The drive flags are encoded in the 8 upper bits of @ref gpio_dt_flags_t as
      21             :  * follows:
      22             :  *
      23             :  * - Bit 8: GPIO Supply Voltage Select
      24             :  *          Selects the voltage rail used for the pin.
      25             :  *          0: VDDIO
      26             :  *          1: VDDIOH
      27             :  *
      28             :  * - Bit 9: GPIO Drive Strength Select,
      29             :  *          MAX32_GPIO_DRV_STRENGTH_0 = 1mA
      30             :  *          MAX32_GPIO_DRV_STRENGTH_1 = 2mA
      31             :  *          MAX32_GPIO_DRV_STRENGTH_2 = 4mA
      32             :  *          MAX32_GPIO_DRV_STRENGTH_3 = 8mA
      33             :  *
      34             :  * - Bit 10: Weak pull up selection, Weak Pullup to VDDIO (1MOhm)
      35             :  *          0: Disable
      36             :  *          1: Enable
      37             :  *
      38             :  * - Bit 11: Weak pull down selection, Weak Pulldown to VDDIOH (1MOhm)
      39             :  *          0: Disable
      40             :  *          1: Enable
      41             :  * @{
      42             :  */
      43             : 
      44             : /** GPIO Voltage Select */
      45           1 : #define MAX32_GPIO_VSEL_POS    (8U)
      46           0 : #define MAX32_GPIO_VSEL_MASK   (0x01U << MAX32_GPIO_VSEL_POS)
      47           0 : #define MAX32_GPIO_VSEL_VDDIO  (0U << MAX32_GPIO_VSEL_POS)
      48           0 : #define MAX32_GPIO_VSEL_VDDIOH (1U << MAX32_GPIO_VSEL_POS)
      49             : 
      50             : /** GPIO Drive Strength Select */
      51           1 : #define MAX32_GPIO_DRV_STRENGTH_POS  (9U)
      52           0 : #define MAX32_GPIO_DRV_STRENGTH_MASK (0x03U << MAX32_GPIO_DRV_STRENGTH_POS)
      53           0 : #define MAX32_GPIO_DRV_STRENGTH_0    (0U << MAX32_GPIO_DRV_STRENGTH_POS)
      54           0 : #define MAX32_GPIO_DRV_STRENGTH_1    (1U << MAX32_GPIO_DRV_STRENGTH_POS)
      55           0 : #define MAX32_GPIO_DRV_STRENGTH_2    (2U << MAX32_GPIO_DRV_STRENGTH_POS)
      56           0 : #define MAX32_GPIO_DRV_STRENGTH_3    (3U << MAX32_GPIO_DRV_STRENGTH_POS)
      57             : 
      58             : /** GPIO bias weak pull up selection, to VDDIO (1MOhm) */
      59           1 : #define MAX32_GPIO_WEAK_PULL_UP_POS   (10U)
      60           0 : #define MAX32_GPIO_WEAK_PULL_UP       (1U << MAX32_GPIO_WEAK_PULL_UP_POS)
      61             : /** GPIO bias weak pull down selection, to VDDIOH (1MOhm) */
      62           1 : #define MAX32_GPIO_WEAK_PULL_DOWN_POS (11U)
      63           0 : #define MAX32_GPIO_WEAK_PULL_DOWN     (1U << MAX32_GPIO_WEAK_PULL_DOWN_POS)
      64             : 
      65             : /** @} */
      66             : 
      67             : /** @} */
      68             : 
      69             : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ADI_MAX32_GPIO_H_ */