LCOV - code coverage report
Current view: top level - zephyr/dt-bindings/gpio - adi-sdp-120.h Coverage Total Hit
Test: new.info Lines: 6.1 % 33 2
Test Date: 2025-09-05 20:47:19

            Line data    Source code
       1            1 : /**
       2              :  * Copyright (c) 2024 Analog Devices Inc.
       3              :  * Copyright (c) 2024 Baylibre, SAS
       4              :  *
       5              :  * SPDX-License-Identifier: Apache-2.0
       6              :  *
       7              :  * @file
       8              :  * @brief SDP-120 GPIO index definitions
       9              :  *
      10              :  * Defines meant to be used in conjunction with the "adi,sdp-120"
      11              :  * ADI SDP-120 mapping.
      12              :  *
      13              :  * Example usage:
      14              :  *
      15              :  * @code{.dts}
      16              :  * &spi1 {
      17              :  *         cs-gpios = <&sdp_120 SDP_120_SPI_SS_N GPIO_ACTIVE_LOW>;
      18              :  *
      19              :  *         example_device: example-dev@0 {
      20              :  *                 compatible = "vnd,spi-device";
      21              :  *                 reg = <0>;
      22              :  *         };
      23              :  * };
      24              :  * @endcode
      25              :  */
      26              : 
      27              : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ADI_SDP_120_H_
      28              : #define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ADI_SDP_120_H_
      29              : 
      30              : /* GPIO */
      31              : 
      32              : /**
      33              :  * @brief IO[n] signal on a SDP-120 GPIO nexus node following
      34              :  */
      35              : 
      36            1 : #define SDP_120_IO(n) (n-1)
      37              : 
      38              : /* SPI */
      39            0 : #define SDP_120_SPI_D2                          SDP_120_IO(33)  /* SPI_D2 */
      40            0 : #define SDP_120_SPI_D3                          SDP_120_IO(34)  /* SPI_D3 */
      41            0 : #define SDP_120_SERIAL_INT                      SDP_120_IO(35)  /* SERIAL_INT */
      42            0 : #define SDP_120_SPI_SEL_B_N                     SDP_120_IO(37)  /* SPI_SEL_B_N */
      43            0 : #define SDP_120_SPI_SEL_C_N                     SDP_120_IO(38)  /* SPI_SEL_C_N */
      44            0 : #define SDP_120_SPI_SS_N                        SDP_120_IO(39)  /* SPI_SS_N */
      45              : 
      46              : /* GPIO */
      47            0 : #define SDP_120_GPIO0                           SDP_120_IO(43) /* GPIO0 */
      48            0 : #define SDP_120_GPIO2                           SDP_120_IO(44) /* GPIO2 */
      49            0 : #define SDP_120_GPIO4                           SDP_120_IO(45) /* GPIO4 */
      50            0 : #define SDP_120_GPIO6                           SDP_120_IO(47) /* GPIO6 */
      51              : 
      52              : /* TMR */
      53            0 : #define SDP_120_TMR_A                           SDP_120_IO(48) /* TMR_A */
      54              : 
      55              : /* USART */
      56            0 : #define SDP_120_UART_RX                         SDP_120_IO(59) /* UART2_RX */
      57            0 : #define SDP_120_UART_TX                         SDP_120_IO(62) /* UART2_TX */
      58              : 
      59              : /* TMR */
      60            0 : #define SDP_120_TMR_D                           SDP_120_IO(72) /* TMR_D */
      61            0 : #define SDP_120_TMR_B                           SDP_120_IO(73) /* TMR_B */
      62              : 
      63              : /* GPIO */
      64            0 : #define SDP_120_GPIO7                           SDP_120_IO(74) /* GPIO7 */
      65            0 : #define SDP_120_GPIO5                           SDP_120_IO(76) /* GPIO5 */
      66            0 : #define SDP_120_GPIO3                           SDP_120_IO(77) /* GPIO3 */
      67            0 : #define SDP_120_GPIO1                           SDP_120_IO(78) /* GPIO1  */
      68              : 
      69              : /* I2C */
      70            0 : #define SDP_120_SCL_0                           SDP_120_IO(79) /* SCL_0 */
      71            0 : #define SDP_120_SDA_0                           SDP_120_IO(80) /* SDA_0 */
      72              : 
      73              : /* SPI */
      74            0 : #define SDP_120_SPI_CLK                         SDP_120_IO(82) /* SPI_CLK */
      75            0 : #define SDP_120_SPI_MISO                        SDP_120_IO(83) /* SPI_MISO */
      76            0 : #define SDP_120_SPI_MOSI                        SDP_120_IO(84) /* SPI_MOSI */
      77            0 : #define SDP_120_SPI_SEL_A_N                     SDP_120_IO(85) /* SPI_SEL_A_N */
      78              : 
      79              : /* SPORT - no driver yet */
      80            0 : #define SDP_120_SPI_SPORT_TSCLK                 SDP_120_IO(87) /* SPORT_TSCLK */
      81            0 : #define SDP_120_SPI_SPORT_DT0                   SDP_120_IO(88) /* SPORT_DT0 */
      82            0 : #define SDP_120_SPI_SPORT_TFS                   SDP_120_IO(89) /* SPORT_TFS */
      83            0 : #define SDP_120_SPI_SPORT_RFS                   SDP_120_IO(90) /* SPORT_RFS */
      84            0 : #define SDP_120_SPI_SPORT_DR0                   SDP_120_IO(91) /* SPORT_DR0 */
      85            0 : #define SDP_120_SPI_SPORT_RSCLK                 SDP_120_IO(92) /* SPORT_RSCLK */
      86              : 
      87              : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ADI_SDP_120_H_ */
        

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