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1 0 : /* 2 : * Copyright (c) 2019 Piotr Mienkowski 3 : * Copyright (c) 2018 Linaro Limited 4 : * 5 : * SPDX-License-Identifier: Apache-2.0 6 : */ 7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_GPIO_H_ 8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_GPIO_H_ 9 : 10 : /** 11 : * @brief GPIO Driver APIs 12 : * @defgroup gpio_interface GPIO Driver APIs 13 : * @ingroup io_interfaces 14 : * @{ 15 : */ 16 : 17 : /** Mask for DT GPIO flags. */ 18 1 : #define GPIO_DT_FLAGS_MASK 0x3F 19 : 20 : /** 21 : * @name GPIO pin active level flags 22 : * @{ 23 : */ 24 : 25 : /** GPIO pin is active (has logical value '1') in low state. */ 26 1 : #define GPIO_ACTIVE_LOW (1 << 0) 27 : /** GPIO pin is active (has logical value '1') in high state. */ 28 1 : #define GPIO_ACTIVE_HIGH (0 << 0) 29 : 30 : /** @} */ 31 : 32 : /** 33 : * @name GPIO pin drive flags 34 : * @{ 35 : */ 36 : 37 : /** @cond INTERNAL_HIDDEN */ 38 : 39 : /* Configures GPIO output in single-ended mode (open drain or open source). */ 40 : #define GPIO_SINGLE_ENDED (1 << 1) 41 : /* Configures GPIO output in push-pull mode */ 42 : #define GPIO_PUSH_PULL (0 << 1) 43 : 44 : /* Indicates single ended open drain mode (wired AND). */ 45 : #define GPIO_LINE_OPEN_DRAIN (1 << 2) 46 : /* Indicates single ended open source mode (wired OR). */ 47 : #define GPIO_LINE_OPEN_SOURCE (0 << 2) 48 : 49 : /** @endcond */ 50 : 51 : /** Configures GPIO output in open drain mode (wired AND). 52 : * 53 : * @note 'Open Drain' mode also known as 'Open Collector' is an output 54 : * configuration which behaves like a switch that is either connected to ground 55 : * or disconnected. 56 : */ 57 1 : #define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN) 58 : /** Configures GPIO output in open source mode (wired OR). 59 : * 60 : * @note 'Open Source' is a term used by software engineers to describe output 61 : * mode opposite to 'Open Drain'. It behaves like a switch that is either 62 : * connected to power supply or disconnected. There exist no corresponding 63 : * hardware schematic and the term is generally unknown to hardware engineers. 64 : */ 65 1 : #define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE) 66 : 67 : /** @} */ 68 : 69 : /** 70 : * @name GPIO pin bias flags 71 : * @{ 72 : */ 73 : 74 : /** Enables GPIO pin pull-up. */ 75 1 : #define GPIO_PULL_UP (1 << 4) 76 : 77 : /** Enable GPIO pin pull-down. */ 78 1 : #define GPIO_PULL_DOWN (1 << 5) 79 : 80 : /** @} */ 81 : 82 : /** 83 : * Configures GPIO interrupt to wakeup the system from low power mode. 84 : */ 85 1 : #define GPIO_INT_WAKEUP (1 << 6) 86 : 87 : /* Note: Bits 15 downto 8 are reserved for SoC specific flags. */ 88 : 89 : /** 90 : * @} 91 : */ 92 : 93 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_GPIO_H_ */