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1 0 : /* 2 : * Copyright (c) 2022 Schlumberger 3 : * 4 : * SPDX-License-Identifier: Apache-2.0 5 : */ 6 : 7 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INFINEON_XMC4XXX_INTC_H_ 8 : #define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INFINEON_XMC4XXX_INTC_H_ 9 : 10 0 : #define XMC4XXX_INTC_PORT_POS 0 11 0 : #define XMC4XXX_INTC_PORT_MASK 0xf 12 : 13 0 : #define XMC4XXX_INTC_PIN_POS 4 14 0 : #define XMC4XXX_INTC_PIN_MASK 0xf 15 : 16 0 : #define XMC4XXX_INTC_LINE_POS 8 17 0 : #define XMC4XXX_INTC_LINE_MASK 0x7 18 : 19 0 : #define XMC4XXX_INTC_ERU_SRC_POS 11 20 0 : #define XMC4XXX_INTC_ERU_SRC_MASK 0x7 21 : 22 0 : #define XMC4XXX_INTC_GET_PORT(mx) ((mx >> XMC4XXX_INTC_PORT_POS) & XMC4XXX_INTC_PORT_MASK) 23 0 : #define XMC4XXX_INTC_GET_PIN(mx) ((mx >> XMC4XXX_INTC_PIN_POS) & XMC4XXX_INTC_PIN_MASK) 24 0 : #define XMC4XXX_INTC_GET_LINE(mx) ((mx >> XMC4XXX_INTC_LINE_POS) & XMC4XXX_INTC_LINE_MASK) 25 0 : #define XMC4XXX_INTC_GET_ERU_SRC(mx) ((mx >> XMC4XXX_INTC_ERU_SRC_POS) & XMC4XXX_INTC_ERU_SRC_MASK) 26 : 27 0 : #define XMC4XXX_INTC_SET_LINE_MAP(port, pin, eru_src, line) \ 28 : ((port) << XMC4XXX_INTC_PORT_POS | (pin) << XMC4XXX_INTC_PIN_POS | \ 29 : (eru_src) << XMC4XXX_INTC_ERU_SRC_POS | (line) << XMC4XXX_INTC_LINE_POS) 30 : 31 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INFINEON_XMC4XXX_INTC_H_ */