Line data Source code
1 0 : /*
2 : * Copyright (c) 2017 Linaro Limited
3 : *
4 : * SPDX-License-Identifier: Apache-2.0
5 : */
6 : #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INTEL_IOAPIC_H_
7 : #define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INTEL_IOAPIC_H_
8 :
9 0 : #define IRQ_TYPE_LEVEL 0x00008000
10 0 : #define IRQ_TYPE_EDGE 0x00000000
11 0 : #define IRQ_TYPE_LOW 0x00002000
12 0 : #define IRQ_TYPE_HIGH 0x00000000
13 0 : #define IRQ_DELIVERY_LOWEST 0x00000100
14 0 : #define IRQ_DELIVERY_FIXED 0x00000000
15 :
16 : /*
17 : * for most device interrupts, lowest priority delivery is preferred
18 : * since this ensures only one CPU gets the interrupt in SMP systems.
19 : */
20 0 : #define IRQ_TYPE_LOWEST_EDGE_RISING (IRQ_DELIVERY_LOWEST | IRQ_TYPE_EDGE | IRQ_TYPE_HIGH)
21 0 : #define IRQ_TYPE_LOWEST_EDGE_FALLING (IRQ_DELIVERY_LOWEST | IRQ_TYPE_EDGE | IRQ_TYPE_LOW)
22 0 : #define IRQ_TYPE_LOWEST_LEVEL_HIGH (IRQ_DELIVERY_LOWEST | IRQ_TYPE_LEVEL | IRQ_TYPE_HIGH)
23 0 : #define IRQ_TYPE_LOWEST_LEVEL_LOW (IRQ_DELIVERY_LOWEST | IRQ_TYPE_LEVEL | IRQ_TYPE_LOW)
24 :
25 : /* for interrupts that want to be delivered to all CPUs, e.g. HPET */
26 0 : #define IRQ_TYPE_FIXED_EDGE_RISING (IRQ_DELIVERY_FIXED | IRQ_TYPE_EDGE | IRQ_TYPE_HIGH)
27 0 : #define IRQ_TYPE_FIXED_EDGE_FALLING (IRQ_DELIVERY_FIXED | IRQ_TYPE_EDGE | IRQ_TYPE_LOW)
28 0 : #define IRQ_TYPE_FIXED_LEVEL_HIGH (IRQ_DELIVERY_FIXED | IRQ_TYPE_LEVEL | IRQ_TYPE_HIGH)
29 0 : #define IRQ_TYPE_FIXED_LEVEL_LOW (IRQ_DELIVERY_FIXED | IRQ_TYPE_LEVEL | IRQ_TYPE_LOW)
30 :
31 : #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INTEL_IOAPIC_H_ */
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